A Survey and Quantitative Evaluation of Integrated Circuit-Based Antenna Interfaces and Self-Interference Cancellers for Full-Duplex

Abstract

Full-duplex (FD) wireless -simultaneous transmission and reception on the same frequency -is a promising technique that can significantly improve spectrum efficiency and reduce communication latency in future wireless networks. To enable FD operation, the powerful self-interference (SI) signal leaking from the transmitter (TX) into the receiver (RX) needs to be suppressed and canceled to an extreme degree at the antenna interface as well as in the RF/analog and digital domains. Various approaches to achieve TX-RX isolation at the antenna interface and SI cancellation (SIC) in the RF/analog and digital domains have been demonstrated, with a focus on using bench-top off-the-shelf components. Recent advances in integrated circuit (IC) implementations of various types of shared antenna interfaces and cancellers in the RF and/or analog baseband (BB) domains have further pushed the frontier of realizing FD wireless in small-form-factor/hand-held devices. Moreover, it is still important to fundamentally study the SIC performance that can be achieved by different types of cancellers. In this paper, we present a first-of-its-kind comprehensive overview on the implementation and comparison of various state-of-theart integrated shared antenna interfaces and SI cancellers in both the RF and analog BB domains. We define two figures of merit (FOM) for the IC-based shared antenna interfaces and SI cancellers, which capture various design considerations and performance tradeoffs including the achievable isolation/SIC, bandwidth, noise figure degradation, TX/SI power handling, and power consumption. In particular, we focus on two types of integrated shared antenna interfaces including electrical-balance duplexers and circulators. We also discuss two types of SI cancellers based on the time-domain and frequency-domain approaches, which respectively employ parallel delay lines and bandpass filters to emulate the SI channel. Based on realistic measurements, we perform extensive numerical evaluations to illustrate and compare the achievable RF SIC performance in different scenarios, as well as discuss various design tradeoffs. Finally, we provide an overview of the IC-based implementations and performance evaluations of both types of cancellers based on our recent work. INDEX TERMS Full-duplex wireless, integrated circuit (IC), antenna interface, self-interference cancellation, systems and testbeds. TINGJUN CHEN (Member, IEEE) received the B.Eng. degree in electronic engineering from Tsinghua University in 2014, and the Ph.D. degree in electrical engineering from Columbia University in 2020. He is an Assistant Professor with the Department of Electrical and Computer Engineering, Duke University and was a Postdoctoral Associate with Yale University from 2020 to 2021. His research interests are in the area of networking and communications with a specific focus on next-generation wireless networks and Internet-of-Things systems.

STAR Front-End Using Two Circulators in a Differential Connection

“…We reviewed existing approaches and their achievable cancellation, and compared them with our proposed SIC technique in the following section. In most cases, shared aperture STAR (SA-STAR) architecture either uses balanced duplexers or circulators to realize full-duplex operation [2]. Circulators are building blocks for full-duplex transceivers as it allows STAR operation within the same band of interest.…”

Open-access full-duplex wireless in the ORBIT and COSMOS testbeds

“…Extensive research related to FD wireless is summarized in [2], [9], [24], including implementations of FD radios and systems, analysis of rate gains, and resource allocation at the higher layers. Below, we briefly review the related work.…”

“…Seskar is with WINLAB, Rutgers University, New Brunswick, NJ, USA (e-mail: seskar@winlab.rutgers.edu) T. Chen is with the Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA (e-mail: tingjun.chen@duke.edu). and SIC in analog/RF and digital domains [5]- [9]. However, RF cancellers achieving wideband SIC at sub-6 GHz operating frequencies (e.g., [7], [8]) commonly rely on transmission-line delays, which cannot be realized in small-form-factor nodes and/or integrated circuits (ICs) due to the required length for generating nanosecond-scale time delays and the lossy nature of the silicon substrate.…”

“…However, RF cancellers achieving wideband SIC at sub-6 GHz operating frequencies (e.g., [7], [8]) commonly rely on transmission-line delays, which cannot be realized in small-form-factor nodes and/or integrated circuits (ICs) due to the required length for generating nanosecond-scale time delays and the lossy nature of the silicon substrate. 1 A compact IC-based design is necessary for supporting FD in hand-held devices (e.g., handsets and tablets) [3], [9]- [14]. There are several approaches at the circuit-level enabling wideband RF SIC on RFICs [4], [9] including switched-capacitor delay lines [14], [15], Tx-Rx isolation via bidirectional frequency conversion [13], and frequency-domain equalization (FDE) [11], [16].…”

“…1 A compact IC-based design is necessary for supporting FD in hand-held devices (e.g., handsets and tablets) [3], [9]- [14]. There are several approaches at the circuit-level enabling wideband RF SIC on RFICs [4], [9] including switched-capacitor delay lines [14], [15], Tx-Rx isolation via bidirectional frequency conversion [13], and frequency-domain equalization (FDE) [11], [16]. In this paper, we focus on the FDE method 1 For instance, obtaining a nanosecond delay in silicon typically requires a 15 cm-long delay line.…”