A Survey of RISC Processors and Computers of the Mid-1980s

Gimarc,; Milutinovic,

doi:10.1109/mc.1987.1663695

Cited by 42 publications

(7 citation statements)

References 2 publications

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“…These researchers' observations led to the formulation of new ideas/goals that were radically different than those of conventional architecture, CISC, designs. RISC design philosophy can be stated as follows [6]:…”

Section: Cisc and Risc Design Philosophiesmentioning

confidence: 99%

An overview of RISC architecture

Aletan¹

1992

Proceedings of the 1992 ACM/SIGAPP Symposium on Applied Computing: Technological Challenges of the 1990's

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Computer architecture designs are usually based on historical data, and the development of computers has been influenced by three factors: market (users), software and hardware methods, and technology. Of the three factors, technology is the most dominant. The reduced instruction set computer (RISC) has emerged as a formidable competitor to the conventional, complex instruction set computer (CISC), systems. The emergence of RISC was a direct result of advances in technology and historical data collected on how instruction sets are used by compilers. Advances in very large scale integration and compilers are enabling RISC architecture to exploit parallelism in systems that are conventional sequential in their mode of operation. The second generation of RISC processors are utilizing superpipelining or superscalar to achieve execution speed that was once attainable only on mainframes and supercomputers. Future RISC processors will use both superscalar and superpipelining techniques to achieve speed beyond the 50 MIPS that is attainable on some of today's processors.

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Section: Cisc and Risc Design Philosophiesmentioning

confidence: 99%

An overview of RISC architecture

Aletan¹

1992

Proceedings of the 1992 ACM/SIGAPP Symposium on Applied Computing: Technological Challenges of the 1990's

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“…It is necessary to distinguish the RISe design philosophy from its design techniques in order to obtain an objective assessment of its usefulness for future robotic computation hardware design. The fundamental principle of the RISe philosophy is to base the architecture resource allocation decisions on the analysis of the needs of the target applications and the potential benefits of a specific decision [GiMi87]. In contrast, other design philosophies may pursue goals such as support of system functions, support of a real-time environment, easy programming, or direct execution of high-level languages.…”

Section: Risementioning

confidence: 99%

ASIC System Design with VHDL: A Paradigm

Leung¹,

Shanblatt²

1989

The Kluwer International Series in Engineering and Computer Science

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Logic Minimization Algorithms jor VLSI Synthesis. R.K. Brayton, 0.0. Hachtel, C.T. McMullen, and A.L. Sangiovanni-Vincentelli. ISBN 0-89838-164-9. Adaptive Filters: Structures, Algorithms, and Applications. M.L. Honig and D.O. Messerschmitt. ISBN 0-89838-163-0. Introduction to VLSI Silicon Devices: Physics, Technology and Characterization. B. El-Kareh and R.I. Bombard. ISBN 0-89838-210-6. Latchup in CMOS Technology: The Problem and Its Cure. R.R. Troutman. ISBN 0-89838-215-7. Digital CMOS Circuit Design. M. Annaratone. ISBN 0-89838-224-6. The Bounding Approach to VLSI Circuit Simulation. C.A. Zukowski. ISBN 0-89838-176-2. Multi-Level Simulationjor VLSI Design. D.O. Hill and D.R. Coelho. ISBN 0-89838-184-3. RelQXlltion Techniques jor the Simulation oj VLSI Circuits. 1. White and A. Sangiovanni-Vincentelli. ISBN 0-89838-186-X. VLSI CAD Tools and Applications. W. Fichtner and M. Morf, editors. ISBN 0-89838-193-2. A VLSI Architecturejor Concurrent Data Structures. W.l. Dally. ISBN 0-89838-235-1. Yield Simulation jor Integrated Circuits. D.M.H. Walker. ISBN 0-89838-244-0.

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“…While most instructions in the set resemble those appearing in other processors (Gimarc and Milutinovic 1987), their specific implementation is unique. Four instructions are special, and are presented as a result of the peculiarities of FCP: Insert-Tag (InsTag), , and Dereference (Deref).…”

Section: Special Instructionsmentioning

confidence: 99%

“…It employs a novel structured methodology for the optimal design of CARMEL-I. This methodology is based on, and extends, the well known RISC concept (Katevenis 1984, Gimarc andMilutinovic 1987) by suiting it for logic programming languages like Prolog and FCP. The analysis includes, a definition of a four-level language hierarchy: FCP, FCP abstract machine (FAM), and the machine (simple, RISC-like) instruction set level.…”

Section: Introductionmentioning

confidence: 99%