A survey of techniques for dynamic branch prediction

Abstract

Branch predictor (BP) is an essential component in modern processors since high BP accuracy can improve performance and reduce energy by decreasing the number of instructions executed on wrong-path. However, reducing the latency and storage overhead of BP while maintaining high accuracy presents significant challenges. In this paper, we present a survey of dynamic branch prediction techniques. We classify the works based on key features to underscore their differences and similarities. We believe this paper will spark further research in this area and will be useful for computer architects, processor designers, and researchers. KEYWORDSdynamic branch predictor, hybrid BP, neural BP, perceptron predictorside BP, pipelining, predictor accuracy, review, side BP, speculative execution, two-level BP INTRODUCTIONControl-changing instructions such as branches add uncertainty in the execution of dependent instructions and thus lead to large performance loss in pipelined processors. To offset their overhead, accurate prediction of branch outcomes is vital. Since branch misprediction incurs high latency (eg, 14 to 25 cycles 1 ) and wastes energy due to execution of instructions on wrong-path, an improvement in BP* accuracy can boost performance and energy efficiency significantly. For example, experiments on real processors showed that reducing the branch mispredictions by half improved the processor performance by 13%. 2Effective design and management of BPs, however, presents several challenges. Design of BP involves a strict tradeoff between area, energy, accuracy, and latency. An increase in BP complexity for improving accuracy may make it infeasible for implementation or offset its performance benefit. For example, a 512 KB perceptron predictor may provide lower instruction-per-cycle than its 32 KB version, 3 and a 2-cycle fully accurate BP may provide lower instruction-per-cycle than a 1-cycle partially inaccurate BP. 4 Further, due to its high access frequency, BP becomes a thermal hot-spot, 5 and hence, reducing its dynamic and leakage energy is important. Clearly, intelligent techniques are required for resolving these issues.Further, recently, researchers have demonstrated two security vulnerabilities viz., "Meltdown" and "Spectre," which exploit speculative execution feature of modern CPUs. 6-8 For example, Spectre vulnerability works on the observation that the speculative execution due to a branch misprediction may leave side effects, which can reveal sensitive data to attackers, eg, if the memory accesses performed during speculative execution depends on sensitive data, the resulting state of the cache forms a side-channel through which the sensitive data can be leaked. These vulnerabilities affect nearly every modern CPU. While avoiding speculative execution (eg, disabling branch prediction) can mitigate these vulnerabilities, it leads to significant performance loss. In light of these vulnerabilities and associated tradeoffs, a deeper study of branch predictors is definitely required. Contributions:In this ...

Polynomial Evaluation on Superscalar Architecture, Applied to the Elementary Function e x

“…The overhead of masking is visible in the boundary column of the Table 7. To conclude, Intel released for its latest product native conditional SIMD instructions that should improve the performance, and a full investigation of branching and the performance of the predictor is a tough task, as it is demonstrated in the last survey of the technology [Mittal 2018], or the microprocessor branching unit description of Fog [2016].…”

A survey of techniques for improving efficiency of mobile web browsing

“…The lower performance of Atom is due to the higher latency of divide operation, smaller cache, and higher branch misprediction rate due to the complex control flow of search operation . Yet, the data path resources of Xeon are over‐provisioned, which leads to higher area.…”

“…The lower performance of Atom is due to the higher latency of divide operation, smaller cache, and higher branch misprediction rate due to the complex control flow of search operation. 92 Yet, the data path resources of Xeon are over-provisioned, which leads to higher area. Overall, since different functions/phases of the search operation have different bottlenecks, a variety of strategies are required, eg, application tuning, architectural improvements, etc.…”

Opportunistic Early Pipeline Re-steering for Data-dependent Branches

“…This information, referred to as global branch history, is then used to predict the incoming branch's direction. Branch predictor proposals in literature track specific branches in the global history [27] or only use the specific branch's prior history (referred to as local history) to provide a prediction. TAgged GEometric history length predictor (TAGE) [35] is one of the most successful branch predictor proposals.…”