A synchronized self oscillating Class-D amplifier for mobile application

Cellier, Rémy; Nagari, Angelo; Hacine, Souha; Pillonnet, Gaël; Abouchi, Nacer

doi:10.1109/esscirc.2012.6341345

Cited by 5 publications

(7 citation statements)

References 8 publications

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“…For measuring linearity, the power stage is operated within a hysteretic-based feedback loop [18]- [20]. For a 1 st -order hysteretic-based loop [20] with the switching frequency set at 230kHz for D=0.5, Fig. 21 shows the THD+N performance when driving a series-connected 2.2µF+3Ω load.…”

Section: Measurement Resultsmentioning

confidence: 99%

Design and Analysis of a High-Efficiency High-Voltage Class-D Power Output Stage

Zee

Nauta

2014

IEEE J. Solid-State Circuits

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The analysis and design of a highly-efficient 80V class-D power stage design in a 0.14µm SOIbased BCD process is described. It features immunity to the on-chip supply bounce, realized by internally regulated floating supplies, variable driving strength for the gate driver, and an efficient 2-step level shifter design. Fast switching transition and low switching loss are achieved with 94% peak efficiency for the complete class-D power stage in the realized chip.

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Section: Measurement Resultsmentioning

confidence: 99%

Design and Analysis of a High-Efficiency High-Voltage Class-D Power Output Stage

Zee

Nauta

2014

IEEE J. Solid-State Circuits

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“…3.21 shows the THD+N performance when driving a series-connected 2.2µF+3Ω load. A THD+N of 0.03% is achieved for fsig=1kHz, which is comparable to [85].…”

Section: Chip Photograph Of the 80v Class-d Power Stagementioning

confidence: 59%

“…For measuring linearity, the power stage is operated within a hysteretic-based feedback loop [83]- [85]. For a 1 st -order hysteretic-based loop [85] with the switching frequency set at 230kHz for D=0.5, Fig. 3.21 shows the THD+N performance when driving a series-connected 2.2µF+3Ω load.…”

Section: Chip Photograph Of the 80v Class-d Power Stagementioning

confidence: 99%

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High-voltage class-D power amplifiers

Ma¹

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Nowadays transducers are ubiquitous as interfaces between the increasingly digital world and the real physical world. The same holds for the power amplifiers driving them. This thesis focuses on the design and optimization of high-voltage class-D amplifiers, which are used for driving capacitive piezoelectric actuator loads in active vibration/noise control applications.The main objective is to further enhance class-D power efficiency compared to existing class-D designs.To gain insight in class D power efficiency, a detailed analysis of high-voltage class-D dissipation sources is performed and a dissipation model including all the major dissipation sources is developed. The analysis shows that switching loss is a potential dominating dissipation source in high-voltage applications, while its contribution can be minimized by fast switching to eliminate V-I overlap losses. Moreover, it is shown that when varying the class-D switching frequency, a minimum total dissipation exists, with the optimal switching frequency depending on the output power. Furthermore, idle loss reduction by increasing the switching frequency and inserting a dead time to the power stage is backed by the analysis.Following the analysis, a fast-switching power stage is designed to aim for switching loss minimization. This output stage design features immunity to the on-chip supply bounce, realized by internally regulated floating supplies, variable driving strength for the gate driver, and an efficient 2-step level shifter design. Fast switching transitions and low switching loss are achieved with 94% peak efficiency for the complete class-D power stage in the realized chip. In addition, gate driver sizing procedures for the class-D output stage are discussed, showing that the variable gate driving strength can greatly improve efficiency when on-chip supply bounce is the limiting factor.Also based on the dissipation analysis, this thesis describes the design of an efficiencyimproved high-voltage class-D power amplifier. The amplifier adaptively regulates its

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“…In addition to the aforementioned modulation schemes, self-oscillating is another modulation scheme employed in CDAs [30,[64][65][66]. The modus operandi of a self-oscillating CDA is very similar to that of an oscillator.…”

Section: Driver Drivermentioning

confidence: 99%

Analysis and design of audio class D amplifiers

Guo¹

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A synchronized self oscillating Class-D amplifier for mobile application

Cited by 5 publications

References 8 publications

Design and Analysis of a High-Efficiency High-Voltage Class-D Power Output Stage

Design and Analysis of a High-Efficiency High-Voltage Class-D Power Output Stage

High-voltage class-D power amplifiers

Analysis and design of audio class D amplifiers

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