A systolic array for approximate string matching

Abstract

The edit distance between two strings al, . . .,a, rind b l , . . . , b, is the minimum cost s of a sequence of editing operations (insertions, deletions and substitutions) that convert one string into the other. This paper presents a linear systolic array for computing the edit distance between two strings over a given alphabet. A n en,coding scheme is proposed which reduces the number of bats required t o represent a state in the computation. The architecture is a parallel realization of the standard dynamic programming algorithm proposed b y Wagner and Fischer, and can perform approximate string matching for variable edit costs. More importantly, the architecture does not place any constraint on the lengths of the strings that can be compared. It makes use of simple basic cells and requires regular nearest-neighbor communication, which makes it suitable f o r VLSI implementation. A protot,ype of this array is currently being built at the Unaversity of South Florida. I IntroductionIn approximate string matching (also known as the string-to-string correction problem , a similarity meabetween two strings. This distance is cornputed using three editing operations, substitution, deletion and insertion. Each of these operations has a cost associated with it. The objective of approximate string matching is to determine the minimum cost required to transform one string into another using these three editing operations.String comparison is an important task, and has aplications in information retrieval, pattern recognition bl 4,51 , error correction, molecular genetics [3,8], and tcxt search and edit systems. Recent advances in Very Large Scale Integration (VLSI) technology have made the development of special purpose architectures and hardware algorithms for complex, computationally intensive algorithms possible. High packaging densities, decrease in gate delays, decreasing fabrication costs, powerful design automation tools, and reliable and fault-tolerant design strategies are some of the advantages of present day VLSI technology.In this paper, we present a linear, systolic array for approximate string matching. The architecture is a sure called the edit distance nee d s to be computed --'This research has been supported in part by the National Svience Foundation Grant No.MIP-9010358.parallel realization of the dynamic programming algorithm proposed by Wagner and Fischer [7]. An encoding scheme is proposed which minimiees the data flow between adjacent processors. More significantly, the array can perform edit distance computations for variable edit costs, and does not impose any constraint on the lengths of the strings that can be processed.In the next section, the merits and demerits of other VLSI architectures proposed in the literature for a p proximate string matching are discussed. Section 3 describes the proposed encoding scheme. In Section 4, a detailed description of the proposed systolic array architecture is presented. A partitioning scheme that can be used when the problem size is too large for the array...

A programmable array processor architecture for flexible approximate string matching algorithms

“…Another important advantage of the proposed architecture presented herein is execution flexible approximate string matching algorithms as opposed to the previous architectures [37,56,57,42,26,15,27,19,7,63,14,53,69,52] that perform simple approximate string matching. Therefore, we introduced the VLSI implementation of the encoding scheme, i.e.…”

“…This architecture has also been used for approximate string matching [19,22,37] by means of a parallelizing a dynamic programming algorithm but it exhibits very limited flexibility due to the encoding scheme used. A similar approach is pursued in [56,57], using again a dynamic programming approach, but an improved encoding scheme and limited communication and control overheads. However, the bi-directional data flow imposes low processor utilization (approximately 50%) and increased computation time (approximately 2n steps instead of n steps, which is the case in the design proposed herein).…”

“…These algorithms require each cell to perform simple bit-level arithmetic and logical operations as opposed to the comparison operations used in other architectures [37,57,56,42,26,15,27,19,7,63,14,53,52]. The advantage of the bit-level arithmetic and logical operations is that they are executed fast enough compared to the comparison operations.…”

“…Some surveys on arrays processors and architectures for approximate string matching and related problems can be found in [6,20,21,54]. A number of arrays processors have been proposed by several researchers for approximate string matching and LCS [11,6,36,37,38,22,57,56,42,26,15,27,18,62,40] and [55,68,30,28,29,31,32,39,33,35,34], respectively. Recently, we proposed the array processors architectures which perform approximate string matching for flexible patterns that contain don't care, complement and classes symbols [46,43,45,47,48].…”

Scalable Algorithms for Adaptive Statistical Designs

“…Most of this concentrates on theoretical algorithms where the number of processors scales far faster than the input size [8,14,15,12,16], or special purpose systems are created [17,10]. Others [11,19] look at dynamic programming difficulties when the subproblems are not as well understood.…”