A Throughput-Optimized Optical Network for Data-Intensive Computing

Schares, Laurent; Lee, Benjamin G.; Checconi, Fabio; Budd, R.; Rylyakov, Alexander V.; Dupuis, N.; Petrini, Fabrizio; Schow, Clint L.; Fuentes, Pablo; Mattes, Oliver; Minkenberg, Cyriel

doi:10.1109/mm.2014.77

Cited by 58 publications

(6 citation statements)

References 14 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Optical circuit switches are a more attractive solution for memory disaggregation because of their ps-level switching delay. Good candidate approaches are discussed in [7] and [8].…”

Section: System Overviewmentioning

confidence: 99%

A software-defined architecture and prototype for disaggregated memory rack scale systems

Syrivelis

Reale

Katrinis

et al. 2017

2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)

View full text Add to dashboard Cite

Disaggregation and rack-scale systems have the potential of drastically increasing TCO and utilization of cloud datacenters, while maintaining performance. In this paper, we present a novel rack-scale system architecture featuring softwaredefined remote memory disaggregation. Our hardware design and operating system extensions enable unmodified applications to dynamically attach to memory segments residing on physically remote memory pools and use such remote segments in a byteaddressable manner, as if they were local to the application. Our system features also a control plane that automates softwaredefined dynamic matching of compute to memory resources, as driven by datacenter workload needs. We prototyped our system on the commercially available Zynq Ultrascale+ MPSoC platform. To our knowledge, this is the first time a software-defined disaggregated system has been prototyped on commercial hardware and evaluated through industry standard software benchmarks. Our initial resultsusing benchmarks that are artificially highly adversarial in terms of memory bandwidth-show that disaggregated memory access exhibits a round-trip latency of only 134 clock cycles; and a throughput penalty of as low as 55%, relative to locally-attached memory. We also discuss estimations as to how our findings may translate to applications with pragmatically milder memory aggressiveness levels, as well as innovation avenues across the stack opened up by our work.

show abstract

“…Optical circuit switches are a more attractive solution for memory disaggregation because of their ps-level switching delay. Good candidate approaches are discussed in [7] and [8].…”

Section: System Overviewmentioning

confidence: 99%

A software-defined architecture and prototype for disaggregated memory rack scale systems

Syrivelis

Reale

Katrinis

et al. 2017

2017 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS)

View full text Add to dashboard Cite

show abstract

“…The exponential growth of new data traffic, social networks, and rapid technological advancements has stimulated the need to expand the capacity of optical fiber communication [1][2][3]. However, the transmission capacity of traditional single-mode fiber has approached the nonlinear Shannon limit [4,5].…”

Section: Introductionmentioning

confidence: 99%

A Weakly-Coupled Double Bow-Tie Multi-Ring Elliptical Core Multi-Mode Fiber for Mode Division Multiplexing across C+L+U Band

Ren

Liu

et al. 2023

Applied Sciences

View full text Add to dashboard Cite

We herein present a weakly-coupled double bow-tie multi-ring elliptical core multi-mode fiber (DBT-MREC-MMF) supporting 22 eigenmodes for mode division multiplexing across the C+L+U band. The proposed fiber introduces a multi-ring elliptical core, bow-tie air holes, and bow-tie stress-applying areas to effectively split adjacent eigenmodes. By utilizing the finite element method (FEM), we accordingly optimized the fiber to support the 22 modes under the weakly-coupled condition. We evaluated the impact of fiber parameters on the minimum effective refractive index difference (min Δneff) between adjacent eigenmodes, model birefringence (Bm), and bending loss at a wavelength of 1550 nm. Additionally, broadband performance metrics, such as effective modal index (neff), effective index difference (Δneff), effective mode area (Aeff), differential mode delay (DMD), and chromatic dispersion (D), were comprehensively studied over the entire C+L+U band, ranging from 1530 to 1675 nm. The proposed fiber is capable of supporting 22 completely separated eigenmodes with a min Δneff between adjacent eigenmodes larger than 3.089 × 10−4 over the entire C+L+U band. The proposed DBT-MREC-MMF holds great potential for use in short-haul communication systems that require MDM to improve transmission capacity and expand bandwidth.

show abstract

“…The applications target at marketing, biomedicine, cyber-security, finance and national defense and so forth. [11,12]. These application scenarios require that the processors can handle a large number of random data and exploratory requests in real time, to realize nanosecond-scale switching of frequent short messages.…”

Section: Introductionmentioning

confidence: 99%

State of the Art and Perspectives on Silicon Photonic Switches

Song

Huang

et al. 2019

Micromachines

View full text Add to dashboard Cite

In the last decade, silicon photonic switches are increasingly believed to be potential candidates for replacing the electrical switches in the applications of telecommunication networks, data center and high-throughput computing, due to their low power consumption (Picojoules per bit), large bandwidth (Terabits per second) and high-level integration (Square millimeters per port). This review paper focuses on the state of the art and our perspectives on silicon photonic switching technologies. It starts with a review of three types of fundamental switch engines, i.e., Mach-Zehnder interferometer, micro-ring resonator and micro-electro-mechanical-system actuated waveguide coupler. The working mechanisms are introduced and the key specifications such as insertion loss, crosstalk, switching time, footprint and power consumption are evaluated. Then it is followed by the discussion on the prototype of large-scale silicon photonic fabrics, which are based on the configuration of above-mentioned switch engines. In addition, the key technologies, such as topological architecture, passive components and optoelectronic packaging, to improve the overall performance are summarized. Finally, the critical challenges that might hamper the silicon photonic switching technologies transferring from proof-of-concept in lab to commercialization are also discussed.

show abstract

A Throughput-Optimized Optical Network for Data-Intensive Computing

Cited by 58 publications

References 14 publications

A software-defined architecture and prototype for disaggregated memory rack scale systems

A software-defined architecture and prototype for disaggregated memory rack scale systems

A Weakly-Coupled Double Bow-Tie Multi-Ring Elliptical Core Multi-Mode Fiber for Mode Division Multiplexing across C+L+U Band

State of the Art and Perspectives on Silicon Photonic Switches

Contact Info

Product

Resources

About