A tutorial on CRC computations

Ramabadran, Tenkasi V.; Gaitonde, S. S.

doi:10.1109/40.7773

Cited by 184 publications

(70 citation statements)

References 2 publications

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“…To have the above properties the primitive generator polynomial should be used to produce CRC. There are several standard and common CRC that is described in [9]. CRC can be implemented in hardware by three techniques serial, parallel and look-up tables.…”

Section: Crc Calculation Methodsmentioning

confidence: 99%

Double Bits Error Correction for Computational Grid with CRC

Navimipour¹,

Es-hagi²

2009

IJCEE

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Abstract-In grid system error during sending information due to devastating factors like external electromagnetic sources and noise is inevitable. The Cyclic Redundancy Check (CRC) method is used for error detection. CRC is used to control such factors in received information. In this paper, the new method based on CRC has been introduced that is able to detect the exact place of double bits error and correct them. In this method the receiver divide the received data on polynomial generator, g(x), and then get the remainder. Receiver can correct double bits error by comparing the remainder and the content of the look-up table. The result show that presented method can reduce the traffic for application that have low bit error rate (BER).

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Section: Crc Calculation Methodsmentioning

confidence: 99%

Double Bits Error Correction for Computational Grid with CRC

Navimipour¹,

Es-hagi²

2009

IJCEE

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“…The structure parameter u1InPtr and u2InLength are initialized by user. Table 2 provides the machine cycle requirements for the computation of different variants of CRC on Freescale SC140 architecture using conventional BYB, LUT [5]- [7] approaches and out proposed IPC-LUT approach. Optimization level of 0 and 3 can be set in SC140 Integrated Development Environment (IDE) project setting options.…”

Section: Crcmentioning

confidence: 99%

“…Length of each entry is equal to length of CRC polynomial. CrcLutGenerator ( ) function generates the LUT [5] specific to the CRC polynomial. As a part of initialization, members of the stCrc structure are initialized and the LUT is populated by calling the CrcLutGenerator () function.…”

Section: Crcmentioning

confidence: 99%

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Cyclic Redundancy Check: A Novel Software Implementation for machine cycle optimization and analysis for deciding Low Peak to Average Power Ratio Discrete Sequences

Kotade

Nandgaonkar

Nalbalwar

et al. 2017

Proceedings of the International Conference on Communication and Signal Processing 2016 (ICCASP 2016)

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Cyclic Redundancy Check (CRC) is widely used error detection technique in many contemporary communication systems such as Fourth Generation (4G) Mobile Communication-Long Term Evolution (LTE) and LTE Advanced, Wi-Fi, Wireless LAN. For real time embedded systems, code size (Memory), Processor Machine Cycle (Speed) and Power are the three important parameters which are needs to be optimized. CRC is very effective and simple for error detection but its software implementation is not efficient. This paper presents software implementation of CRC using Bit by Bit (BYB) and Look-Up Table (LUT) approaches reported in the earlier literature. Using these approaches, we have compared machine cycle requirements for computation of CRC-3/5/8/12/16 generator polynomials. We have used TMS320C6713 and Freescale Star Core SC140 architectures for comparing the machine cycle requirements. Then we have intuitively modified our software implementations (Based on C program) of LUT using In Place Computation (IPC).This IPC-LUT based CRC computation is found to be more optimized in terms of machine cycle and memory compared to LUT method. We have reduced the machine cycle requirement by 39.47 % using our IPC-LUT approach compared to conventional LUT. We have also developed inline assembly code for SC140 architecture using IPC-LUT approach that takes only 45 machine cycles for computations. Peak to Average Power Ratio (PAPR) is one of the major drawback of contemporary communication systems. For third parameter (Power), we have simply done the analysis to fix up the decision criteria for deciding the sequences having low PAPR.

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“…They utilized cyclic redundancy check (CRC) codes [5] and rate-compatible punctured convolutional (RCPC) channel codes for image transmission over binary symmetric channels (BSCs). Since then, a large body of works (see [6] and references therein) has addressed joint source-channel coding (JSCC) for scalable multimedia transmission over both BSCs and packet-erasure channels.…”

Section: Eurasip Journal On Advances In Signal Processingmentioning

confidence: 99%

Combined Source-Channel Coding of Images under Power and Bandwidth Constraints

Raja

Xiong

Fossorier

2006

EURASIP J. Adv. Signal Process.

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This paper proposes a framework for combined source-channel coding for a power and bandwidth constrained noisy channel. The framework is applied to progressive image transmission using constant envelope M-ary phase shift key (M-PSK) signaling over an additive white Gaussian noise channel. First, the framework is developed for uncoded M-PSK signaling (with M = 2 k ). Then, it is extended to include coded M-PSK modulation using trellis coded modulation (TCM). An adaptive TCM system is also presented. Simulation results show that, depending on the constellation size, coded M-PSK signaling performs 3.1 to 5.2 dB better than uncoded M-PSK signaling. Finally, the performance of our combined source-channel coding scheme is investigated from the channel capacity point of view. Our framework is further extended to include powerful channel codes like turbo and low-density parity-check (LDPC) codes. With these powerful codes, our proposed scheme performs about one dB away from the capacity-achieving SNR value of the QPSK channel.

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A tutorial on CRC computations

Cited by 184 publications

References 2 publications

Double Bits Error Correction for Computational Grid with CRC

Double Bits Error Correction for Computational Grid with CRC

Cyclic Redundancy Check: A Novel Software Implementation for machine cycle optimization and analysis for deciding Low Peak to Average Power Ratio Discrete Sequences

Combined Source-Channel Coding of Images under Power and Bandwidth Constraints

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