A Unified Approach to Mapping and Routing on a Network-on-Chip for Both Best-Effort and Guaranteed Service Traffic

Abstract

One of the key steps in Network-on-Chip-based design is spatial mapping of cores and routing of the communication between those cores. Known solutions to the mapping and routing problems first map cores onto a topology and then route communication, using separate and possibly conflicting objective functions. In this paper, we present a unified single-objective algorithm, called Unified MApping, Routing, and Slot allocation (UMARS+). As the main contribution, we show how to couple path selection, mapping of cores, and channel time-slot allocation to minimize the network required to meet the constraints of the application. The time-complexity of UMARS+ is low and experimental results indicate a run-time only 20% higher than that of path selection alone. We apply the algorithm to an MPEG decoder System-on-Chip, reducing area by 33%, power dissipation by 35%, and worst-case latency by a factor four over a traditional waterfall approach.

Network-on-chip with guaranteed-bandwidth data communication service

“…In order to overcome the contention problem, NoCs which use time-slot-based TDM scheduling to provide guaranteed-service should provide a time-slot allocation algorithm to achieve a contention-free routing. Such algorithms for instances have been introduced in [3], [11] and in [12].…”

“…The work in [11] proposes a unified Mapping, Routing and Slot Allocation (UMARS+) algorithm for NoCs supporting BestEffort and Guaranteed Services. The proposed algorithm couples path selection, mapping of application on cores and channel time-slot allocation to minimize a network required to meet the constraint of the application.…”

“…Link scheduling at runtime during application executions based on the time-slot allocation technique is difficult, and the probability that a packet fails to establish connection is high because of the conflict-free routing requirement. Therefore, a specific (probably a complex) time-slot allocation algorithm is required to achieve the conflict-free routing and scheduling as proposed in the aforementioned works in [11], [3] and [12]. The aforementioned approaches lead to a few time-overhead.…”

“…In addition, the works in [11], [3] and in [12] have presented the off-line algorithms (high-effort software solutions) for finding conflict-free routing based on time-slot allocation on every communication link. In this paper, we propose only a simple and flexible hardware solution by using the local ID slots organization technique, in which the routing conflicts can be simply managed without the off-line software.…”

Bandwidth Analysis of Functional Interconnects Used as Test Access Mechanism

“…This requires a guaranteed bandwidth and latency between cores. In our case, this is achieved through time-division multiplexing (TDM) in the NI kernel [12,13]. The NOC hardware (RTL of the topology of routers and NIs, etc.)…”