Multipath routing algorithm for application‐specific wormhole NoCs

Abstract

Adaptive routing designing for network-on-chip architecture is complicated to guarantee deadlock-free. In this paper, we present methodology to design efficient multi-path routing algorithms for specific application wormhole network-on-chip system to guarantee deadlock-free. The methodology presents an analytical model for overall average delay of wormhole network-on-chip by queueing theory and uses a linear programming-based methodology to minimize overall average delay. The methodology guarantees deadlock freedom by efficient branch-and-bound algorithm. Compared to other adaptive deadlock-free algorithms, results obtained through simulation show that the algorithms can potentially achieve better throughput and latency. KEYWORDS multi-path, network-on-chip, routing algorithms 1 opens new directions in the customization of the routing algorithms for the application. 14 Those literature 12,15,16 have proposed several deadlock-free routing algorithms without considering the information of the specific application traffic. They designed those routing algorithms under any type of traffic to guarantee the deadlock freedom of NoC system and improve good average performance. 17 Thus, they naturally assume that each nodes of the NoC system may communicate to each other node and all the source ejecting nodes have same ejecting traffic rate.However, we may get accurate information of the specific application traffic for the area of NoC system. 17 Furthermore, traditional routing algorithm for mesh topology is achieved at a high loss of adaptive. 2,12 A limitation of those routing algorithms is that they cannot ensure deadlock freedom for an irregular mesh topology in which cores could occupy more than one tile. 2

Foreword to the special issue on networked system security and efficiency

“…There is another paper discussing networking systems, for application‐specific wormhole Network‐on‐Chip architecture, in Zhuansun et al, which proposes adaptive multipath routing algorithm for guaranteeing the deadlock free. The methodology presents an analytical model for overall average delay of wormhole network on chip by queueing theory and uses a Linear Programming‐based methodology to minimize overall average delay.…”

Design of time‐interleaved data acquisition system based on Network on Chip

“…Therefore, with the continuous expansion of the system scale, especially when the number of AD data acquisition nodes in the system increases sharply, the system has exposed limitations in design method, architecture, scalability, and data transmission efficiency. How to break through these limitations is an urgent problem to be solved 5‐10 …”

“…NoC is a method to solve the problem of traditional bus architecture and the global asynchronous local synchronization of the SoC 7 . The core technology of NoC is transplanting the existed computer network technology in the Printed Circuit Board into a chip to realize a Local Area Network on the chip 8,9 .…”