A Unified Solution to Scan Test Volume, Time, and Power Minimization

Abstract

-The double-tree scan-path architecture, originally proposed for low test power, is adapted to simultaneously reduce the test application time and test data volume under external testing. Experimental results show significant performance improvements over other existing scan architectures.

A test pattern generation method with high compression ratio

“…The stuck-at fault coverage achieved by the proposed method with higher compression ratio is similar with that of [3]. In addition, the number of test patterns is relatively small because we adopt the deterministic testing method.…”

“…Sub-columns '#Patterns' and '#Seed' refer to the number of test patterns and the number of seeds, respectively. Compared with the method in [3,4,5], the proposed method demonstrates higher compression ratios.…”

“…Synthesis and optimization are carried out using a SMIC 0.18 µm technology library. The test frequency is 100 MHz, and the power supply voltage is 1.1 V. Table I compares the compression ratios of the proposed method with those in [3,4,5]. The column labeled 'SFC' shows the stuck-at fault coverage of the CUT.…”