A versatile data string-search VLSI

Hirata, Minoru; Yamada, H.; Nagai, Hidenori; Takahashi, Kazutoshi

doi:10.1109/4.992

Cited by 27 publications

(6 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The computation time of Knuth's algorithm (Knuth et al 1977) is given by O(n+m) 1989). String-search VLSI circuits have been investigated by Hirata (Hirata et al 1988). Foster (Foster and Kung 1980).…”

Section: Neural Represent a Tion And Motion Equationsmentioning

confidence: 99%

Neural Network Parallel Computing

Takefuji

1992

149

View full text Add to dashboard Cite

show abstract

Section: Neural Represent a Tion And Motion Equationsmentioning

confidence: 99%

Neural Network Parallel Computing

Takefuji

1992

149

View full text Add to dashboard Cite

show abstract

“…Parallel CAM is composed of a parallel arrangement of single-port CAMs. In large-scale applications, it is often desirable to improve processing performance by using parallel CAM [4,6,[11][12][13][14]. However, in parallel CAM the hardware complexity and the cost are inevitably increased.…”

Section: Background Of Multiport Structurementioning

confidence: 99%

“…In this context, there have been many studies and practical uses of CAM, including the above applications. Examples include cache tag tables, TLBs (translation lookaside buffers), which are tables used to speed up the conversion from logical addresses to physical addresses, neural networks, address filters, data compression, dictionary retrieval, and associative processors [2][3][4][5][6][7][8]. There are factors that hinder their practical use, such as the relation between processing speed and hardware complexity, and also the problem of cost.…”

Section: Introductionmentioning

confidence: 99%

A flexible multiport content-addressable memory

2006

View full text Add to dashboard Cite

SUMMARYThis paper is concerned with content-addressable memory (CAM), which is a kind of functional memory. Flexible multiport content-addressable memory (FMCAM) is proposed, in which flexible retrieval functions and a multiport structure are realized. The implementation and an evaluation are presented. It is known that CAM offers high speed of the matching retrieval function. On the other hand, there are problems in practice concerning the relation between the processing speed and the number of comparators, and also the problem of cost, which have prevented its widespread use. Consequently, we developed the following FMCAM. Multiport CAM is realized by reducing the increase of the number of comparators while retaining highspeed matching retrieval functions. Functions for flexible retrieval can be added by implementation in an FPGA. By the categorization process and the use of a ring counter, multiple processing operations can be performed immediately while reducing the number of comparators. This improves the performance of the CAM itself. Another advantage is that FMCAM alone can perform the same processing in situations in which parallel CAM should be applied. After implementing the proposed FMCAM, several tests were performed for comparison. Excellent values were obtained: the AT product was 37.5% lower on average than in conventional CAM, and the increase in hardware complexity was by a factor of 1.57 even if the number of ports was increased by a factor of 4.

show abstract

“…The use of content addressable memories for text search has centered around two strategies: cellular automata [12,10,11] and finite state machines [14,7]. The cellular automata methods cascade CAMs temporally and then use pointers to propagate matches from one CAM set to another [9].…”

Section: Introductionmentioning

confidence: 99%

A keyword match processor architecture using content addressable memory

Chandy

2004

Proceedings of the 14th ACM Great Lakes Symposium on VLSI

View full text Add to dashboard Cite

This paper demonstrates a keyword match processor capable of performing fast dictionary search with approximate match capability. Using a content addressable memory with processor element cells, the processor can process arbitrary sized keywords and match input text streams in a single clock cycle. The processor is capable of determining approximate match and providing distance information as well. A 64-word design has been developed using 19000 transistors and it could be expanded to larger sizes easily. Using a modest 0.5 micron process, we are achieving cycle times of 8 ns and the design will scale to smaller feature sizes.

show abstract

A versatile data string-search VLSI

Cited by 27 publications

References 7 publications

Neural Network Parallel Computing

Neural Network Parallel Computing

A flexible multiport content-addressable memory

A keyword match processor architecture using content addressable memory

Contact Info

Product

Resources

About