The reverse engineering (RE) of electronic chips and systems can be used with honest and dishonest intentions. To inhibit RE for those with dishonest intentions (e.g., piracy and counterfeiting), it is important that the community is aware of the state-of-the-art capabilities available to attackers today. In this article, we will be presenting a survey of RE and anti-RE techniques on the chip, board, and system levels. We also highlight the current challenges and limitations of anti-RE and the research needed to overcome them. This survey should be of interest to both governmental and industrial bodies whose critical systems and intellectual property (IP) require protection from foreign enemies and counterfeiters who possess advanced RE capabilities.

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M assively parallel distributed-memory multicomputers can achieve the high performance levels required to solve the Grand Challenge computational science problems (a class of computational applications, identified by the 1992 US Presidential Initiative in High-Performance Computing and Communications, that would require a significant increase in computing power). Multicomputers such as the Intel Paragon, the IBM SP-l/SP-2 (Scalable PowerParallel 1 and 2) and the Thinking Machines CM-5 (Connection Machine 5) offer significant cost and scalability advantages over shared-memory multiprocessors. However, to harness these machines' computational power, users must write efficient software. This process is laborious because of the absence of global address space. The programmer must manually distribute computations and data across processors and explicitly manage communication. The Paradigm (Parallelizing Compiler for Distributed-Memory, General-Purpose Multicomputers) project at the University of Illinois addresses this problem by developing automatic methods for efficient parallelization of sequential programs.

Physical Unclonable Functions (PUF) are the result of random uncontrollable variables in the manufacturing process. A PUF can be used as a source of random but reliable data for applications such as generating chip identification and encryption keys. Among various types of PUFs, an intrinsic PUF is the result of a preexisting manufacturing process, does not require any additional circuitry, and is cost effective. In this paper, we introduce an intrinsic PUF based on dynamic random access memories (DRAM). DRAM PUFs can be used in low cost identification applications and also have several advantages over other PUFs such as large input patterns. The DRAM PUF relies on the fact that the capacitor in the DRAM initializes to random values at startup. We demonstrate real DRAM PUFs and describe an experimental setup to test different operating conditions on three DRAMs to achieve the highest reliable results. Finally, we select the most stable bits to use as chip ID using our enrollment algorithm.

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