A Versatile Sampling ADC System for On-Detector Applications and the AdvancedTCA Crate Standard

Abstract

A data acquisition system based on sampling analog to digital converters (ADCs) and data processing in field programmable gate arrays (FPGAs) is presented. Up to 32 ADC channels are combined with reconfigurable logic on a small mezzanine form factor card to get a handy module for analog data acquisition. This module can then be mounted either on a dedicated detector frontend or included in an Advanced Telecom Computing Architecture (ATCA) crate system. For on-detector usage the system provides several features for fail safe and also fail tolerant operation and data readout. This opens applications in high energy physics detectors with difficult access schemes to the electronic part. The crate system offers on the other hand a high channel density with moderate channel costs. Additionally, the ATCA standard provides enough data bandwidth for online data processing within the crate system. Due to the unified interface of the ADC mezzanine cards, the system cost can be further reduced by an easy up-or downgrade of the ADC sampling frequency or the channel count by exchanging just the mezzanine card and thus maintaining the whole surrounding infrastructure. This enables to serve different detector requirements with a limited number of different mezzanine card types and eases also further enhancements with new upcoming ADC or FPGA devices.

A Digital Trigger for the Electromagnetic Calorimeter at the COMPASS Experiment

“…The signal is digitized by two interleaved 12 bit ADCs running at 38.88 MHz each, providing an effective sampling rate of 77.76 MHz. 16 detector channels are read out via one Mezzanine Sampling ADC (MSADC) [4] card. Four cards are mounted on one carrier card providing a total readout of 64 channels per module, Fig.…”

Upgrade of the COMPASS calorimetric trigger

“…The digitisation is done by two interleaved 12 bit ADCs running at 38.99 MHz each. One Mezzanine Sampling ADC (MSADC) [4] card collects data from 16 channels while one carrier card further combines four of these mezzanine cards providing in total 64 detector channels per 9U VME module. Both cards utilise Virtex-4 FPGAs.…”

The universal sampling ADC readout system of the COMPASS experiment

“…The core component is a small form factor mezzanine sampling ADC (MSADC) card [11] of size 130 mm × 70 mm, which includes for this application 16 differential channels, sampled at 80 MS/s by two interleaved ADCs with 12 bit resolution. For data processing, a Virtex4 LX25 FPGA is connected to the four ADC chips on each MSADC module and connects via single ended and differential IO-lines to a carrier card.…”