A vertical bubble flow network using inductive-coupling for 3-D CMPs

Abstract

A wireless 3-D NoC architecture for CMPs, in which the number of processor and cache chips stacked in a package can be changed after the chip fabrication, is proposed by using the inductive coupling technology that can connect more than two known-good-dies without wire connections. Each chip has data transceivers for uplink and downlink in order to communicate with its neighboring chips in the package. These chips form a single vertical ring network so as to fully exploit the flexibility of the wireless approach that enables us to add, remove, and swap the chips in the ring. To avoid protocol and structural deadlocks in the ring network, we use the bubble flow control which is more flexible and efficient compared to the conventional VC-based deadlock avoidance. We implemented a real 3-D chip that has onchip routers and inductive-coupling data transceivers using a 65nm process in order to show the feasibility of our proposal. The vertical bubble flow control is compared with the conventional VC-based approach and vertical bus in terms of the throughput, hardware amount, and application performance using a full system CMP simulator. The results show that the proposed vertical bubble flow network outperforms the VC-based approach by 7.9%-12.5% with a 33.5% smaller router area. *

Escalator Network for a 3D Chip Stack with Inductive Coupling ThruChip Interface

“…For detail about the bubble flow control, the reader can refer to [15]. Also, the detail implementation in Cube-1 is shown in [16].…”

Vertical Link On/Off Regulations for Inductive-Coupling Based Wireless 3-D NoCs

“…Although a half part of Cube-0 is occupied by the vertical shared bus interface, we focus on the point-to-point vertical links for ring network in this paper. The details about the vertical bus is described in the paper [10]. Figure 2 shows the side view of four chips in a package.…”

“…One Tx/Rx pair is used for 35-bit flit transfer, while another Vertical Bubble flow control [10] is also proposed for ring topology with virtual cut-through (VCT) switching to avoid deadlock. Each chip has a pair of data transceivers for uplink and downlink to form a ring.…”

“…Inductive-coupling is versatile and has been applied to various 3-D IC embedded systems, such as multi-core processors [8] and dynamically reconfigurable processors [9]. In addition, it has been applied to Network-on-Chips (NoCs) to extend the conventional 2-D NoC to 3-D [10]. A real wireless 3-D NoC chip, called Cube-0, has been developed in order to validate the concept.…”

Dynamic power control with a heterogeneous multi-core system using a 3-D wireless inductive coupling interconnect

“…Unlike previous prototypes [4], it is consisting of a chip with a host embedded processor and multiple chips each of which provides a coarse grained reconfigurable processor array called CMA (Cool Mega Array) [5]. Each chip provides a network interface with DMA controller, routers and inductive coupling interconnect.…”