A wide tuning range gated varactor

Wong, Wan Keung; Hui, Ping; Chen, Zhiheng; Ke-qiang, Shen; Lau, J.; Chan, P.C.H.; Ko, P.K.

doi:10.1109/4.841506

Cited by 34 publications

(13 citation statements)

References 5 publications

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“…A high varactor with a wide tuning range of capacitance is indispensable to reducing the phase noise of a VCO and making its bandwidth wide. Recently, device engineers sporadically tried to utilize gate oxide in CMOS and/or BiCMOS [2]- [4] to achieve the aforementioned goal in a VCO, using its noticeable dielectric characteristic. However, the noise level that affects the phase noise of an oscillator can not be easily lowered in a MOS device because of interface states, oxide traps, and border traps of the oxide-silicon interface [5].…”

Section: Introductionmentioning

confidence: 99%

The enhancement of Q factor in RPCVD SiGe varactors by the structural modification of the base-collector junction

Mheen

Suh

Kim

et al. 2003

IEEE Electron Device Lett.

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We designed two silicon germanium (SiGe) varactors enhanced in factor through a structural modification by using a cost-effective SiGe heterostructure bipolar transistor (HBT) process, a conventional reduced-pressure chemical vapor deposition (RPCVD). As a result, the suggested structures showed a superiority in factor (160/GHz/pF at 2.5 GHz) to the conventional one (70/GHz/pF), even with neither a change in process nor an additional mask. We attributed the enhancement of factor to the structural feature of the varactors and quantitatively analyzed it with a lumped element model.

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Section: Introductionmentioning

confidence: 99%

The enhancement of Q factor in RPCVD SiGe varactors by the structural modification of the base-collector junction

Mheen

Suh

Kim

et al. 2003

IEEE Electron Device Lett.

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“…The metal oxide semiconductor (MOS) varactor, completed with other capacitors, has some advantages such as a smaller size, a higher tuning ratio, and a larger unit capacitance than the p-n junction varactor [3]. Currently, some modified methods of micromachined [4], gated varactor [5], SOI varactor [6] come close to the high performance of high tuning ratio and high Q-factors. However, with an increasing oscillator frequency, it is very difficult to obtain both optimized high Q-factors and high tuning-ratio range MOS varactor without a post-process variation.…”

Section: Introductionmentioning

confidence: 99%

“…Recently, several methods for designing UWB BPFs have been proposed, such as multiple-mode resonator [2], stepped-impedance resonator (SIR) [3], parallel coupled line [4], or slot-line structure [5][6][7][8]. For example, a UWB BPF is proposed by using two microstrip opencircuited stubs coupled to a single CPW resonator on the other side of a commercial substrate [5]. Additionally, a notch band is needed …”

Section: Introductionmentioning

confidence: 99%

Optimization and modeling for MOS varactors in 65 nm low‐power mixed‐signal/radio‐frequency technology

Chen

Jiang

Chang

et al. 2009

Micro & Optical Tech Letters

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CMOS technology scaling opens up the possibility of designing variable capacitors based on a metal oxide semiconductor (MOS) structure with improved tuning range and quality factor. In this work, the high Q‐factor 24 and 21, wide tuning ratio 45% and 36% can be achieved by 65 nm low power technology n+/n‐well and p+/p‐well MOS varactor up to 10 GHz, respectively. Meanwhile, the equivalent circuit model, to model intrinsic and extrinsic parameters of MOS varactor, also have demonstrated that parasitic resistance is a main issue to dominate Q‐factors, and the measured flicker noise result of MOS varactor is directly dependant on gate leakage current. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2119–2121, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24567

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“…signal. A MOSEFT varactor[2] is used to control the resonance to regulate the output voltage. The reason for this…”

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confidence: 99%

Integrated Digital Control Scheme for Fully Integrated High Frequency DC-DC Power Converter

Shi

Hess

2008

2008 IEEE Workshop on Microelectronics and Electron Devices

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A digital control scheme for fully integrated high frequency, the conventional pulse width modulation (PWM) is frequency DC-DC power converter is presented in this paper. A no longer practical due to die size occupation and power resonant converter current mode control algorithm uses a consumption. Therefore, digital controller is designed to meet varactor-based control to obtain a regulated output featu ore, as controllininterfae and voltage. Control algorithm is based on an accurate estimate of the new features such as varactor controlling interface and output voltage response and a state machine-based resonance characteristic of this new converter.formulation. Employing a current-mode approach simplifies This paper is developed in following order. Section II computation nicely, enabling an efficient and effective control introduces the principle of the control algorithm. The algorithm. Typical response time for voltage regulation is 430ns for a 500MHz system. Eight-bit data conversion is used in this implementation of control algorithm and the data conVversio design. The control system is built on TSMC 0.25um mixedsystem are proposed in section III. Section IV shows the signal process. Simulation results verified the design. simulation result of proposed digital controlled on-chip power

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A wide tuning range gated varactor

Cited by 34 publications

References 5 publications

The enhancement of Q factor in RPCVD SiGe varactors by the structural modification of the base-collector junction

The enhancement of Q factor in RPCVD SiGe varactors by the structural modification of the base-collector junction

Optimization and modeling for MOS varactors in 65 nm low‐power mixed‐signal/radio‐frequency technology

Integrated Digital Control Scheme for Fully Integrated High Frequency DC-DC Power Converter

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