A wideband current-reuse-RGC TIA circuit with low-power consumption

Hida, Akira; Nakane, Yusuke; Mizuno, Shunta; Nakamura, Makoto; Ito, Daisuke; Nakano, Satoshi; Nosaka, Hideyuki

doi:10.1587/elex.16.20190615

Cited by 6 publications

(2 citation statements)

References 26 publications

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“…In case, if they are not integrated in the same technology platform, then the input/output are matched to 50 Ω impedance. The same approach has been adopted here, as well as in literature [16], [17]. At the measurement level, as per the available literature, it is not possible to measure transimpedance gain (Z t ) directly and is always calculated from the S-parameters [16], [17].…”

Section: Measurement Results Of Ku-band Tiamentioning

confidence: 99%

Single Stage Low Noise Inductor-Less TIA for RF Over Fiber Communication

Kumar

Saravanan²,

Duraiswamy

et al. 2021

IEEE Access

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This paper presents design, mathematical analysis, and measurement of low noise singlestage transimpedance amplifier (TIA) with scalable bandwidth using 130 nm bipolar complementary metaloxide-semiconductor (BiCMOS) silicon-germanium (SiGe) process. Common-emitter (CE) shunt-shunt feedback topology with active inductor peaking has been used in the design for improving noise, gain and driving capability of TIA by decreasing the input and output impedance, respectively. The use of active inductive peaking in CE shunt-shunt feedback topology has resulted in a new TIA configuration with better performance. The circuit has been optimized for low noise performance by adopting the proposed design technique. Validity of the mathematical analysis and design for the proposed TIA has been established with the help of simulations as well as measurement results. The measurement results of Ku-band TIA (10 MHz to 14 GHz) have demonstrated a transimpedance gain of 53.2 dBΩ, input-referred current noise of 16.8 pA/ √Hz with power consumption of 9.8 mW . The design architecture is adaptable for higher frequency bands, which has been demonstrated by designing another TIA covering K-and Ka-bands (10 MHz to 35 GHz) with transimpedance gain of 33.4 dBΩ, input-referred current noise of 29.4 pA/ √Hz with power consumption of 28.1 mW in the post-layout simulation results, and occupies same chip area as that of 14 GHz, i.e., 0.1 × 0.21 mm 2 INDEX TERMS BiCMOS, CE topology, inductive peaking, low noise, silicon-photonics, TIA

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Section: Measurement Results Of Ku-band Tiamentioning

confidence: 99%

Single Stage Low Noise Inductor-Less TIA for RF Over Fiber Communication

Kumar

Saravanan²,

Duraiswamy

et al. 2021

IEEE Access

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“…For high-speed TIA, achieving maximum bit rates requires a flat response of the magnitude of the transimpedance within the frequency range of interest. The use of networks, such as T-coil peaking, shunt-series peaking, shunt-peaking, and π-type peaking, have been reported to increase the bandwidth and remove the passband ripple [15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30]. However, the bondwire inductance and the parasitic capacitance of the PD vary from chip to chip in engineering applications; thus, the TIA should be designed to be robust to these variations.…”

Section: Introductionmentioning

confidence: 99%

A 25-Gb/s high-sensitivity transimpedance amplifier with bandwidth enhancement

Luo

Chen³

et al. 2020

IEICE Electron. Express

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Low-power and small-area 4-ch 25-Gb/s transimpedance amplifiers in 65-nm CMOS process

Takahashi

Ito

Nakamura

et al. 2023

IEICE Electron. Express

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We present an area-efficient and low-power four-channel 25-Gb/s trans-impedance amplifier for an Rx analog front-end (Rx-AFE) on an optical receiver. The proposed circuit features a local negative-feedback trans-impedance amplifier (TIA) to expand the bandwidth. The TIA and post-amplifier use regulated cascode (RGC) topology and two differential amplifier stages with an inductive peaking bandwidth extension technique to acquire 19.6 GHz of the −3 dB bandwidth and 53.3 dBΩ of the gain. We designed the system using a 65-nm CMOS process, and the proposed four-channel Rx-AFE TIAs achieved a small area of 300 𝜇m × 800 𝜇m per lane. From the measurement results, the differential output voltage was 160 mV at 25-Gb/s PRBS31. The test chip has also 85.0 mW of power consumption; hence, it achieves 0.85 mW/Gb/s of power efficiency.

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A wideband current-reuse-RGC TIA circuit with low-power consumption

Cited by 6 publications

References 26 publications

Single Stage Low Noise Inductor-Less TIA for RF Over Fiber Communication

Single Stage Low Noise Inductor-Less TIA for RF Over Fiber Communication

A 25-Gb/s high-sensitivity transimpedance amplifier with bandwidth enhancement

Low-power and small-area 4-ch 25-Gb/s transimpedance amplifiers in 65-nm CMOS process

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