A zero-crossing based 10-bit 100 MS/s pipeline ADC with controlled current in 90 nm CMOS

Abstract

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A low‐power 10‐bit CCP‐based pipelined ADC using a multi‐level variable current source MDAC and an ultra‐low‐power double‐tail dynamic latch

“…In Fiorenza et al 13 and Fiorenza, 14 comparator-based-switched-capacitor (CBSC) technique has been proposed for the first time, in which the OTA is replaced by a comparator and a constant current source (CCS). After that, other techniques such as capacitive-charge-pump 15,16 and zero-crossing-based pipelined ADC 3,[17][18][19] have been presented for eliminating OTA in MDAC circuits, too.…”