ABACUS: A technique for automated behavioral synthesis of approximate computing circuits

Nepal, Kumud; Li, Yueting; Bahar, R. Iris; Reda, Sherief

doi:10.7873/date2014.374

Cited by 41 publications

(4 citation statements)

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“…As manual approximation is not an efficient design method, systematic methods have been developed, e.g. [9]. In our previous work, we used CGP to approximate digital circuits such as adders, multipliers and medianoutputting circuits [14,15].…”

Section: Approximate Computingmentioning

confidence: 99%

Evolutionary Approximation of Software for Embedded Systems

Mrázek

Vašíček

Sekanina

2015

Proceedings of the Companion Publication of the 2015 Annual Conference on Genetic and Evolutionary Computation

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This paper deals with genetic programming-based improvement of non-functional properties of programs intended for low-cost microcontrollers. As the objective is to significantly reduce power consumption and execution time, the approximate computing scenario is considered in which occasional errors in results are acceptable. The method is based on Cartesian genetic programming and evaluated in the task of approximation of 9-input and 25-input median function. Resulting approximations show a significant improvement in the execution time and power consumption with respect to the accurate median function while the observed errors are moderate.

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Section: Approximate Computingmentioning

confidence: 99%

Evolutionary Approximation of Software for Embedded Systems

Mrázek

Vašíček

Sekanina

2015

Proceedings of the Companion Publication of the 2015 Annual Conference on Genetic and Evolutionary Computation

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“…In Nepal et al [31], the precision-scaling technique has been used to reduce the power consumption of a perceptron classifier [32,33]. Starting from a behavioral description of the classifier to be approximate, several different hardware configurations have been generated, by making use of the Automated Behavioral Synthesis of Approximate Computing Systems (ABACUS) tool.…”

Section: Approximate Classifiersmentioning

confidence: 99%

Advancing synthesis of decision tree-based multiple classifier systems: an approximate computing case study

2021

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So far, multiple classifier systems have been increasingly designed to take advantage of hardware features, such as high parallelism and computational power. Indeed, compared to software implementations, hardware accelerators guarantee higher throughput and lower latency. Although the combination of multiple classifiers leads to high classification accuracy, the required area overhead makes the design of a hardware accelerator unfeasible, hindering the adoption of commercial configurable devices. For this reason, in this paper, we exploit approximate computing design paradigm to trade hardware area overhead off for classification accuracy. In particular, starting from trained DT models and employing precision-scaling technique, we explore approximate decision tree variants by means of multiple objective optimization problem, demonstrating a significant performance improvement targeting field-programmable gate array devices.

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“…Given a rich body of low/circuit level approximation techniques, how to efficiently utilize them at system level is of great importance but not well studied yet. In [5], an automated design space exploration technique is introduced to choose between approximate and per-bitwidth precise implementations for each operation. However, it pays little attention to scheduling and resource allocation/binding algorithms, which are the core techniques in HLS.…”

Section: Introductionmentioning

confidence: 99%

“…As such, almost any opportunity for improving chip/circuit power efficiency is worth close study. In this context, approximate computing recently arises as new research trend [1][2][3][4][5][6]. In conventional designs, datapath computations are precise for its bitwidth, i.e., the error is restricted to those less than the least significant bit weight.…”

Section: Introductionmentioning

confidence: 99%

Joint precision optimization and high level synthesis for approximate computing

Li¹,

Luo²,

Sapatnekar

et al. 2015

Proceedings of the 52nd Annual Design Automation Conference

105

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Approximate computing has been recognized as an effective low power technique for applications with intrinsic error tolerance, such as image processing and machine learning. Existing efforts on this front are mostly focused on approximate circuit design, approximate logic synthesis or processor architecture approximation techniques. This work aims at how to make good use of approximate circuits at system and block level. In particular, approximation aware scheduling, functional unit allocation and binding algorithms are developed for data intensive applications. Simple yet credible error models, which are essential for precision control in the optimizations, are investigated. The algorithms are further extended to include bitwidth optimization in fixed point computations. Experimental results, including those from Verilog simulations, indicate that the proposed techniques facilitate desired energy savings under latency and accuracy constraints.

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ABACUS: A technique for automated behavioral synthesis of approximate computing circuits

Cited by 41 publications

References 0 publications

Evolutionary Approximation of Software for Embedded Systems

Evolutionary Approximation of Software for Embedded Systems

Advancing synthesis of decision tree-based multiple classifier systems: an approximate computing case study

Joint precision optimization and high level synthesis for approximate computing

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