2006
DOI: 10.1088/0953-2048/19/5/s39
|View full text |Cite
|
Sign up to set email alerts
|

Access time measurements of Josephson–CMOS hybrid memory using single-flux-quantum circuits

Abstract: We have measured access time of a 16-kbit Josephson-CMOS hybrid memory by using an SFQ delay measurement system. The delay measurement system is composed of a Josephson latching driver to generate input signals for the memory, an SFQ clock generator and counter to measure the time interval, and a current sense circuit to detect the current output from the memory. The time resolution of the system corresponds to a clock period of the clock generator, which is 50 ps in our design. In these preliminary measuremen… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2

Citation Types

0
3
0

Year Published

2010
2010
2022
2022

Publication Types

Select...
5
2

Relationship

0
7

Authors

Journals

citations
Cited by 14 publications
(3 citation statements)
references
References 8 publications
0
3
0
Order By: Relevance
“…Many SFQ techniques are devolved to attain high speed and low power consumption. Various approaches have been developed on Josephson, CMOS hybrid memory cell, which is high density CMOS memory array and low power Single flux Quantum (SFQ) logic [1][2][3][4]. In addition, the hybrid model must work at cryogenic temperature.…”
Section: Introductionmentioning
confidence: 99%
“…Many SFQ techniques are devolved to attain high speed and low power consumption. Various approaches have been developed on Josephson, CMOS hybrid memory cell, which is high density CMOS memory array and low power Single flux Quantum (SFQ) logic [1][2][3][4]. In addition, the hybrid model must work at cryogenic temperature.…”
Section: Introductionmentioning
confidence: 99%
“…One potential application of the hybrid systems is a Josephson-CMOS hybrid memory [2,3,4,5,6]. In the hybrid memory, memory cells and address decoders are made up with CMOS circuits, while Josephson current-sense circuits are used to detect small bit-line current with short delay.…”
Section: Introductionmentioning
confidence: 99%
“…Previous measurement methods have some obvious drawbacks. One of the methods is to quantise the access time by a counter circuit working at a much higher frequency than the SRAM clock speed [6]. This method requires an extremely high-speed counter circuit, which is hard to realise in a standard CMOS process.…”
mentioning
confidence: 99%