Accurate Compact Modeling for Sub-20-nm nand Flash Cell Array Simulation Using the PSP Model

Jeon, Jongwook; Park, Il Han; Kang, Myounggon; Hahn, Wook-Ghee; Choi, Kihwan; Yun, Seokho; Yang, Gi–Young; Lee, Keun-Ho; Park, Young-Kwan; Chung, Chilhee

doi:10.1109/ted.2012.2219863

Cited by 10 publications

(1 citation statement)

References 13 publications

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“…Charge-trap flash (CTF) memories are considered to represent the promising alternative in order for eventually replacing the floating-gate (FG) flash memory technologies in the near future owing to its higher device scalability and are targeted by developments of the most recent three-dimensional (3D) array architectures indeed. [1][2][3][4][5][6][7][8][9] Various device structures and charge trapping layer materials have been adopted for advancing the CTF memories and different physical mechanisms have been closely studied in the respective cell operations. In this work, a highly compact and accurate circuit model of CTF memory cell is proposed, in consideration of the transient behaviors for describing the program operations.…”

Section: Introductionmentioning

confidence: 99%

Highly compact and accurate circuit-level macro modeling of gate-all-around charge-trap flash memory

Kim

Lee

Kim³

et al. 2016

Jpn. J. Appl. Phys.

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In this paper, a highly reliable circuit model of gate-all-around (GAA) charge-trap flash (CTF) memory cell is proposed, considering the transient behaviors for describing the program operations with improved accuracy. Although several compact models have been reported in the previous literature, time-dependent behaviors have not been precisely reflected and the failures tend to get worse as the operation time elapses. Furthermore, the developed SPICE models in this work have been verified by the measurement results of the fabricated flash memory cells having silicon–oxide–nitride–oxide–silicon (SONOS). This more realistic model would be beneficial in designing the system architectures and setting up the operation schemes for the leading three-dimensional (3D) stack CTF memory.

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