Proceedings of the 2008 International Conference on Compilers, Architectures and Synthesis for Embedded Systems 2008
DOI: 10.1145/1450095.1450129
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Active control and digital rights management of integrated circuit IP cores

Abstract: We introduce the first approach that can actively control multiple hardware intellectual property (IP) cores used in an integrated circuit (IC). The IP rights owner(s) can remotely monitor, control, enable, or disable each individual IP on each chip. The approach introduces a paradigm shift in the microelectronic business model, nurturing smaller businesses, and supporting the design-reuse paradigm. The IPs can be controlled by the original designer or by the designers who reuse them. Each IP has a built-in fu… Show more

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Cited by 30 publications
(14 citation statements)
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“…Note that the use of silicon manufacturing variability for security was introduced earlier [18] and was exploited for other applications [15], [1], [5], [4], [22]. Recently, gate-level characterization of integrated circuits has received a great deal of research interest [24], [14] because of its importance in IC systems and security [4], [3], [2], and post-silicon optimization [6]. The MIT researchers introduced several different PUF structures, and realized the PUFs on both FPGA and ASICs [16], [13].…”
Section: Related Workmentioning
confidence: 99%
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“…Note that the use of silicon manufacturing variability for security was introduced earlier [18] and was exploited for other applications [15], [1], [5], [4], [22]. Recently, gate-level characterization of integrated circuits has received a great deal of research interest [24], [14] because of its importance in IC systems and security [4], [3], [2], and post-silicon optimization [6]. The MIT researchers introduced several different PUF structures, and realized the PUFs on both FPGA and ASICs [16], [13].…”
Section: Related Workmentioning
confidence: 99%
“…First, practical implementations of this structure have been demonstrated on both ASICs and FPGA [16], [12]. Second, a number of researchers employed this structure for real-life applications, e.g., smart cards, RFID security and privacy, and remote IC activation [11], [9], [26], [1], [5], [22], [2]. Third, the concept can be implemented in pure digital structures and thus, it is easily realizable on FPGAs.…”
Section: A Delay-based Pufsmentioning
confidence: 99%
“…While our scheme is based on the metering framework described in [9], we introduce a few techniques to achieve the goal. Firstly, we propose a new metering structure to substitute the Replicated-FSM (RFSM) based metering structure proposed in [8], achieving an improved robustness against brute-force attacks.…”
Section: Overview Of the Proposed Schemementioning
confidence: 99%
“…Moreover, the physically unclonable function (PUF) is used for the ID generation of each chip in our scheme. Luckily, there already exist numerous of weak or strong PUF structures could achieve this goal [8,9,19,23]. The only realistic assumption we made is that the PUF used in the structure could generate stable responses.…”
Section: Comprehensive Metering Schemementioning
confidence: 99%
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