Ad-Hoc Translations to Close Verilog Semantics Gap

Haufe, Christian; Rogin, Frank

doi:10.1109/ddecs.2008.4538785

Cited by 11 publications

(2 citation statements)

References 2 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Haufe et al [4] proposed to change the RTL coding style to reduce X-optimism so that RTL simulation results are closer to the gate level when Xs exist. However, such work is typically not applicable to fixing gate-level simulation because it focuses on finding problems caused by X-optimism instead of X-pessimism.…”

Section: Related Workmentioning

confidence: 99%

Improving gate-level simulation accuracy when unknowns exist

Chang

Browy

2012

Proceedings of the 49th Annual Design Automation Conference

View full text Add to dashboard Cite

Unknown values (Xs) may exist in a design due to uninitialized registers or blocks that are powered down. Due to X-pessimism in gate-level logic simulation, such Xs cannot be handled correctly, producing false Xs that result in inaccurate simulation values. To improve gate-level simulation accuracy when Xs exist, we first trace the fan-in cone of Xs to check whether they are real. For the Xs that are not real, we extract small sub-circuits responsible for creating the false Xs. We then generate auxiliary code to repair gate-level simulation by replacing the Xs with the correct values. Our experimental results on commercial designs show that the proposed methods are both effective and efficient.

show abstract

Section: Related Workmentioning

confidence: 99%

Improving gate-level simulation accuracy when unknowns exist

Chang

Browy

2012

Proceedings of the 49th Annual Design Automation Conference

View full text Add to dashboard Cite

show abstract

“…Instead of fixing logic simulation, Haufe et al [6] proposed to change the RTL coding style to reduce X-optimism so that RTL simulation results are closer to the gate level when Xs exist. However, this method can only alleviate X problems, not eliminate them.…”

Section: Related Workmentioning

confidence: 99%

Automated methods for eliminating X bugs

Chang

Liu

Browy

2014

Fifteenth International Symposium on Quality Electronic Design

View full text Add to dashboard Cite

Unknown values (Xs) may exist in a design due to uninitialized registers or blocks that are powered down. Due to limitations known as X-optimism and X-pessimism, such Xs cannot be handled correctly in logic simulation, producing inaccurate simulation values that can mask X bugs or corrupt simulation results. This can cause X bugs to escape verification and reduces design quality. To resolve such X-related issues, we propose a comprehensive methodology and several novel methods to detect masked Xs at the register transfer level and eliminate false Xs at the gate level. Our case studies show that the proposed methods are both effective and efficient.

show abstract

Debugging at the Electronic System Level

Rogin¹,

Drechsler²

2010

View full text Add to dashboard Cite

Ad-Hoc Translations to Close Verilog Semantics Gap

Cited by 11 publications

References 2 publications

Improving gate-level simulation accuracy when unknowns exist

Improving gate-level simulation accuracy when unknowns exist

Automated methods for eliminating X bugs

Debugging at the Electronic System Level

Contact Info

Product

Resources

About