Adaptive Algorithm Using Hot-Electron Injection for Programming Analog Computational Memory Elements Within 0.2% of Accuracy Over 3.5 Decades

Bandyopadhyay, Abhishek; Serrano, G.; Hasler, P.

doi:10.1109/jssc.2006.880621

Cited by 47 publications

(47 citation statements)

References 14 publications

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“…Floating gates are programmed using hot-electron injection process or Fowler-Nordheim tunneling [21]. Hot electron injection adds charges to the floating gate and effectively reduces the threshold of the device.…”

Section: A Programming Of the Devicementioning

confidence: 99%

“…To inject precisely the model and empirical formula developed in [21] were used. The device is operated in subthreshold region and is injected for a finite amount of time ( =10 ms) with drain to source voltage being 5 volts to obtain the set of curves shown in figure 7.…”

Section: A Programming Of the Devicementioning

confidence: 99%

“…Since their discovery they have been used as an analog memory [18],a floating gate fourier processor [19], and to perform offset cancelation in amplifiers [20] among others. Programming of these devices has been demonstrated with an accuracy of 0.2% over 3 decades [21].…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Floating gate ISFET for therapeutic drug screening of breast cancer cells

Shah

Anderson

Christen

et al. 2014

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

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This paper presents a floating gate Ion Sensitive Field Effect Transistor (ISFET) to monitor the activity of breast cancer cells. We use an ISFET to monitor the change in pH of the cell culture media and to observe the apoptosis of the breast cancer cells when treated with staurosporine. Since ISFETs suffer from inherent mismatch and drift in the threshold voltage, predominantly caused due to accumulation of ions on the surface of the gate, we have integrated a floating gate ISFET to calibrate the device. Floating gate ISFETs have been used to program the threshold voltage of the device either by hot electron injection, Fowler-Nordheim tunneling, and UV to remove charges. In this work we use hot electron injection to precisely program the device and tunneling as a global erase. This enables us to precisely record the changes in pH. These floating gate devices have been fabricated in 0.5 m CMOS process.

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Section: A Programming Of the Devicementioning

confidence: 99%

Section: A Programming Of the Devicementioning

confidence: 99%

See 1 more Smart Citation

Floating gate ISFET for therapeutic drug screening of breast cancer cells

Shah

Anderson

Christen

et al. 2014

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…The amount of charge injected during each pulse depends on both the sourceto-drain voltage and the duration of the pulse. For accurate injection we adopt the algorithm described in [8], however, using a pulse-width instead of a drain voltage modulation.…”

Section: B Weight Storage Mechanismmentioning

confidence: 99%

A dual-mode weight storage analog neural network platform for on-chip applications

Maliuk

Makris

2012

2012 IEEE International Symposium on Circuits and Systems

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On-chip trainable neural networks show great promise in enabling various desired features of modern integrated circuits (IC), such as Built-In Self-Test (BIST), security and trust monitoring, self-healing, etc. Cost-efficient implementation of these features imposes strict area and power constraints on the circuits dedicated to neural networks, which, however, should not compromise their ability to learn fast and retain functionality throughout their lifecycle. To this end, we have designed and fabricated a reconfigurable analog neural network (ANN) chip which serves as an expertise acquisition platform for various applications requiring on-chip ANN integration. With this platform, we intend to address the key cost-efficiency issues: a fully analog implementation with strict area and power budgets, a learning ability of the proposed architecture, fast dynamic programming of the weight memory during training, and high precision non-volatile storage of weight coefficients during operation or standby. We explore two learning structures: a multilayer perceptron (MLP) and an ontogenic neural network with their corresponding training algorithms. The core circuits are biased in weak inversion and make use of the translinear principle for multiplication and non-linear conversion operations. The chip is mounted on a custom PCB and connected to a computer for chip-in-the-loop training. We present measured results of the core circuits and the dual-mode weight memory. The learning ability is evaluated on a 3-input XOR classification task.

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“…We can program the differential charge on M 21 and M 22 to vary the center of the bell-shaped transfer curve, and program the common-mode charge to tune the width. The technique to precisely program the charges in a floating-gate transistor array was described in [3]. Because the template information is stored in a pair of floating-gate transistors as in [4,5], this circuit has the potential to implement adaptive learning algorithms with not only an adaptive mean but also an adaptive variance.…”

Section: The Programmable Bump Circuitmentioning

confidence: 99%

A programmable analog radial-basis-function based classifier

Peng

Tsao

Hasler

et al. 2008

2008 IEEE International Conference on Acoustics, Speech and Signal Processing

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A 16 × 16 programmable analog radial-basis-function (RBF) based classifier is demonstrated. The distribution of each feature is modeled by a Gaussian function, which is realized by a proposed floating-gate bump circuit having bell-shaped transfer characteristics. The maximum likelihood, mean, and variance of the distribution are stored in floating-gate transistors and are independently programmable. By cascading these floating-gate bump circuits, the overall transfer characteristics approximate a multivariate Gaussian distribution with a diagonal covariance matrix. An array of these circuits constitutes a compact RBF-based classifier. When followed by a winner-take-all circuit, the analog classifier can implement vector quantization. Automatic gender identification is implemented on a 16 × 16 analog vector quantizer chip as one possible audio application of this work. The performance of the analog classifier is comparable to that of digital counterparts. The proposed approach can be at least two orders of magnitude more power efficient than the digital microprocessors at the same task.

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Adaptive Algorithm Using Hot-Electron Injection for Programming Analog Computational Memory Elements Within 0.2% of Accuracy Over 3.5 Decades

Cited by 47 publications

References 14 publications

Floating gate ISFET for therapeutic drug screening of breast cancer cells

Floating gate ISFET for therapeutic drug screening of breast cancer cells

A dual-mode weight storage analog neural network platform for on-chip applications

A programmable analog radial-basis-function based classifier

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