Adaptive Continuous Current Source Drivers for 1-MHz Boost PFC Converters

Zhang, Zhiliang; Xu, Pengcheng; Liu, Yanfei

doi:10.1109/tpel.2012.2218619

Cited by 22 publications

(12 citation statements)

References 21 publications

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“…The solid line is the Pareto front, indicating the minimum achievable power consumption for a given transition time. It is expected to facilitate an adaptable gate driver (e.g [3]) in power system by controlling timing parameters with great flexibility.…”

Section: Resultsmentioning

confidence: 99%

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A 15-V, 40-kHz class-D gate driver IC with 62% energy recycling rate

Kang

Lee

Park

et al. 2013

2013 IEEE Asian Solid-State Circuits Conference (A-Sscc)

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This paper presents a new type of gate driver IC that can significantly reduce the gate switching loss by leveraging high-speed and low-power operation of custom integrated circuits. The gate driver itself works as a mini bidirectional buck converter, which charges and discharges the gate terminal of a power device (e.g. IGBT) by feeding a chain of short pulses whose widths gradually increase or decrease into an LC filter. A set of circuit techniques to minimize the energy consumption in generating these pulses at the required frequency of up to 50-MHz and duty-cycle resolution of 5% is presented. A prototype IC fabricated in a 0.25-P Pm HV CMOS demonstrates 27.8-mW power consumption or equivalently 62% energy recycling while switching a 120-nC IGBT at 40-kHz and 15-V.

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Section: Resultsmentioning

confidence: 99%

“…[1], [2]) and current source drivers (e.g. [3], [4]) have been extensively investigated. While these gate drivers share in common that they can save driving loss by storing that energy in an additional inductor, they also require extra components on the gate side, such as the diodes or transistors, as depicted in Fig.…”

Section: Introductionmentioning

confidence: 99%

A 15-V, 40-kHz class-D gate driver IC with 62% energy recycling rate

Kang

Lee

Park

et al. 2013

2013 IEEE Asian Solid-State Circuits Conference (A-Sscc)

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show abstract

“…Assuming equal rise (t r ) and fall times (t f ) of the gate voltage, each gate is subject to a positive current pulse with magnitude I pk at turn-on; and a negative current pulse with magnitude −I pk at turn-off. The RMS current through each gate can then be found to be (5). Since t r = t f , we can define a switching time t sw = t r = t f .…”

Section: B Driver Loss Mechanismsmentioning

confidence: 99%

“…Resonant gate drivers (RGDs) with continuous inductor current are able to transition the power MOSFETs quickly, but experience excessive conduction loss [1]- [5]. Discontinuous current drivers are subject to slow transitions and higher peak currents [6]- [8], but have the benefit of lower conduction loss.…”

Section: Introductionmentioning

confidence: 99%

A Dual-Channel Current Source Driver for Complementary Switches

Tschirhart

Jain

2014

IEEE Trans. Power Electron.

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In this paper, a dual-channel current source driver is presented as an efficient means of driving complementary switches. The driver transfers charge between the gates of the power devices through a single magnetic core with a discontinuous current. This promotes lower conduction loss than continuous current resonant gate drivers (RGDs), and lower component count or conduction loss than existing discontinuous current RGD applied to complementary switches. In addition, controlled switching speed is achieved through nonzero inductor current resulting in lower current stress, and faster switching compared to some pulse RGD circuits. There is good correlation between the analysis and experimental results of a 1.8-MHz prototype.

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“…The HB adaptive continuous CSD was adopted in [15] due to its simple topology and control. In [16] and [17], the FB adaptive continuous CSD was used to eliminate the blocking capacitor in the HB topology to improve its dynamic performance. However, the continuous adaptive CSD has the following disadvantages:…”

Section: Introductionmentioning

confidence: 99%

A Digital Adaptive Discontinuous Current Source Driver for High-Frequency Interleaved Boost PFC Converters

Zhang

Liu

2014

IEEE Trans. Power Electron.

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A digital adaptive current source driver (CSD) is proposed for the interleaved Boost PFC converter. The adaptive drive current is achieved for the CSDs to optimize the switching loss and gate drive loss according to different turn-on and turn-off drain currents in a wide load range. Compared to the adaptive CSDs with the linear regulator, the digital adaptive CSD is able to eliminate the additional loss and cost introduced by the linear regulator. The most important benefit of the digital CSD is that the turn-on and turn-off drive current can be adjusted independently according to the different turn-on and turn-off drain currents. At the same time, the proposed digital CSD is compatible with other advanced digital control technique. The proposed digital CSD is applied to the interleaved Boost PFC converter under critical conduction mode (CRM) to reduce the high turn-off loss and gate drive loss. A 220-V A C input, 380-V/400-W output, two-phase interleaved Boost PFC converter with the switching frequency of 90-500 kHz under CRM was built to verify the functionality and advantages of the digital CSD.Index Terms-Adaptive drive current, current source driver, digital control, power factor correction, power MOSFET.

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Adaptive Continuous Current Source Drivers for 1-MHz Boost PFC Converters

Cited by 22 publications

References 21 publications

A 15-V, 40-kHz class-D gate driver IC with 62% energy recycling rate

A 15-V, 40-kHz class-D gate driver IC with 62% energy recycling rate

A Dual-Channel Current Source Driver for Complementary Switches

A Digital Adaptive Discontinuous Current Source Driver for High-Frequency Interleaved Boost PFC Converters

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