Adaptive Edge Detection Technique Implemented on FPGA

Taslimi, Saeid; Faraji, Rasoul; Aghasi, Ali; Naji, Hamid Reza

doi:10.1007/s40998-020-00333-5

Cited by 13 publications

(7 citation statements)

References 34 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Using the Sobel operator, the paper [21] was able to identify diseases in hevea tree leaves by computing the gradient of each pixel in the image. Harris and susan [22] Histogram (brightness, contrast enhancement, region of interest) [11] Sobel Operator [21], [26] De-hazing [6], [12] Robert, Prewitt, Sobel, and Laplacian of Gaussian (LoG) operator masks [24] Power-of-two terms [24] Canny edge detection [23] Gaussian-based halo-reducing filter [7], [27] Biomedical image enhancement (BIE) [8] Modified context (MCT) [20] Median filter [28] Adding image [1] Adaptive histogram equalization (AHE) [19] 2D adaptive DIP [29] Boundary discriminative noise detection (BDND) [30] Guided image filtering and Halide [31] Discrete wavelet transform (DWT) [2] Contrast, brightness enhancement, image inverting, and threshold operation [32] Gaussian-based smoothing filter [33] Particle swarm [34] Medical image algorithm [35] Out of 13 papers that implemented image enhancement in hardware, only papers [12] and [6] can be compared as only these papers employs similar algorithm. Soma and Jatoth [6] proposed hardware implementation via the use of the Xilinx Zynq-706 FPGA board, while the paper [12] proposes the Xilinx Zynq-7000 FPGA board for its hardware implementation.…”

Section: Rq 1: Application Perspective: What Are the Most Common Appl...mentioning

confidence: 99%

A systematic literature review on hardware implementation of image processing

Azhari

Setumin²,

Rosli³

et al. 2023

IJRES

View full text Add to dashboard Cite

Image processing has become under the spotlight recently and leads to a significant shift in various fields such as biomedical, satellite images, and graphical applications. Nevertheless, the poor quality of an image is one of the noticeable limitations of image processing as it restricts efficient data extraction to be conducted. Conventionally, the image was processed via software applications such as MATLAB. In spite of the software's ability to cater to the data extraction of low-quality image issues, it still suffers from the time-consuming issue. As the ability to obtain a rapid outcome is a favorable feature of efficient image processing, the use of hardware in image processing is deemed to keep the addressed issue at bay. Thus, the image enhancement techniques using hardware have gradually rising interest among researchers with numerous approaches such as field programmable gate array (FPGA). In this study, 25 different research papers published from 2016 to 2021 are studied and analyzed to focus on the performance of FPGA as hardware implementation in image processing techniques.

show abstract

Section: Rq 1: Application Perspective: What Are the Most Common Appl...mentioning

confidence: 99%

A systematic literature review on hardware implementation of image processing

Azhari

Setumin²,

Rosli³

et al. 2023

IJRES

View full text Add to dashboard Cite

show abstract

“…The image edge detection systems are all based on static images [18], and the processing time is calculated according to the processing time of an image, while Monson et al [19] directly used FPGA to process video stream data without the help of a processor. Taslimiet et al [20] and Jiang et al [21] enhanced the processing capacity by improving the computing components. However, Kumar et al [22] uses a low efficiency FPGA, so its processing capacity is relatively poor.…”

Section: Comparative Experiments and Analysismentioning

confidence: 99%

“…FPGA Resolution Time(ms) [18] Xilinx Virtex-5 640*480 6.41 [19] Xilinx Virtex-7 640*480 2.58 [20] Xilinx…”

Section: Papersmentioning

confidence: 99%

A Novel Sobel Edge Detection Accelerator Based on Reconfigurable Architecture

Li¹,

Zheng²

2022

View full text Add to dashboard Cite

A novel Sobel edge detection accelerator based on reconfigurable architecture is proposed to solve the problem of low power-to-performance ratio of traditional Sobel edge detection algorithm in CPU processing. The accelerator adopts pixel level fine grain image data parallel processing and row buffer storage architecture to improve the processing efficiency of edge detection. At the same time, a reconfigurable architecture based on FPGA is built. Through experiments, it can be found that the acceleration effect of the edge detection accelerator on video data is superior to that of the CPU software. Compared with similar accelerators, the acceleration performance of the novel accelerators improves by 10%. The results show that the proposed edge detection accelerator can be used in embedded systems to provide edge detection processing capability with high performance power consumption ratio.

show abstract

“…As a fundamental operation in image and video processing, edge detection is still a vivid but demanding research area. In literature, one might come across approaches that use gradient-based traditional methods [1][2][3] and machine learning-based studies that have recently become very popular [4][5][6][7][8][9]. Although machine learning-based approaches perform much better than traditional gradient-based methods, the high computational load induced by these methods is a serious concern that should be considered [10].…”

Section: Introductionmentioning

confidence: 99%

Edge Detection Method Driven by Knowledge-Based Neighborhood Rules

Capkan

Altun

Fidan

2023

Int. j. eng. technol. innov.

View full text Add to dashboard Cite

Edge detection is a fundamental process, and therefore there are still demands to improve its efficiency and computational complexity. This study proposes a knowledge-based edge detection method to meet this requirement by introducing a set of knowledge-based rules. The methodology to derive the rules is based on the observed continuity properties and the neighborhood characteristics of the edge pixels, which are expressed as simple arithmetical operations to improve computational complexity. The results show that the method has an advantage over the gradient-based methods in terms of performance and computational load. It is appropriately four times faster than Canny method and shows superior performance compared to the gradient-based methods in general. Furthermore, the proposed method provides robustness to effectively identify edges at the corners. Due to its light computational requirement and inherent parallelization properties, the method would be also suitable for hardware implementation on field-programmable gate arrays (FPGA).

show abstract

Adaptive Edge Detection Technique Implemented on FPGA

Cited by 13 publications

References 34 publications

A systematic literature review on hardware implementation of image processing

A systematic literature review on hardware implementation of image processing

A Novel Sobel Edge Detection Accelerator Based on Reconfigurable Architecture

Edge Detection Method Driven by Knowledge-Based Neighborhood Rules

Contact Info

Product

Resources

About