Adaptive power management of on-chip video memory for multiview video coding

2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)

Henkel

2015

Self Cite

The emerging Dark Silicon limitation has led the application designers to carefully consider the available Thermal Design Power (TDP) budgets, hardware resources, and software characteristics. In this paper, we propose a hierarchical scheme for distributing the resources and TDP budget among concurrently executing applications with multi-threaded workloads under throughput constraints. Afterwards, the application-level TDP budget is partitioned among its threads depending upon their workloads, which can then be fine-tuned at run time considering workload variations. We evaluate our scheme for the next-generation, multi-threaded, High Efficiency Video Codec and demonstrate that up to 30.86% higher throughput is achieved compared to the state-of-the-art.

“…This equation can be generated via offline statistics or regression analysis [16] [17]. For a concrete example, refer to Equation 10 in Section III.A.…”

Section: Selection Of Cluster Size Kimentioning

confidence: 99%

Hierarchical power budgeting for Dark Silicon chips

Khan

2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)

Henkel

2015

Self Cite

“…Therefore, video properties such as motion intensity and texture will highly influence the encoding complexity and resulting temperature for a given video and even for different frames in a video. In this work, we classify the frames of a sequence in different complexity classes using the method devised in [21] (i.e. Eqs.…”

Section: Thermal Analysis Of Video Content Propertiesmentioning

confidence: 99%

Tone

Palomino

Proceedings of the 2014 International Symposium on Low Power Electronics and Design

Susin

et al. 2014

Self Cite

This paper presents an adaptive temperature optimization technique for the next generation video encoders. It exploits both applicationspecific knowledge (i.e. video encoding configurations) and video content properties in order to efficiently manage the temperature of advanced video coding systems at the software layer. For designing an efficient technique, we perform an extensive offline analysis to understand the impact of different video properties and configurations on the CPU thermal profiles when processing the next generation video encoder. Our temperature optimization technique performs an application-level prediction of the temperature trend followed by an application-level thermal management policy. The policy dynamically manages the temperature by performing an adaptive encoder configuration selection while providing minimum penalties in terms of bit rate and video quality. The experimental results show that our policy meets temperature constraints with negligible encoding performance loss. Moreover, when compared to state-of-the-art techniques, our policy provides a relatively reduced video quality loss while still meeting the temperature constraints.

“…Various schemes have been proposed for energy and latency reduction of video encoders [11]- [25]. Most of these schemes target the Motion Estimation (ME, also called block-matching) engine for optimization because ME is the most time and energy consuming process of a video encoder.…”

Section: Related Workmentioning

confidence: 99%

“…Most of these schemes target the Motion Estimation (ME, also called block-matching) engine for optimization because ME is the most time and energy consuming process of a video encoder. For example, in [11]- [13], authors have presented approaches to adaptively limit the total external memory accesses while power gating the on-chip memory. But their works only consider SRAM as the on-chip data memory.…”

Section: Related Workmentioning

confidence: 99%

“…Moreover as pointed earlier, NVMs exhibit different characteristics as compared to the traditional SRAMs. This shows that application knowledge (like block-matching algorithm characteristics, video content-dependent memory access patterns [11]- [13], video content properties [18]- [20]) is critical while utilizing the hybrid paradigm to gain the full extent of advantages offered by hybrid memories. This is critical for memory intensive applications like HEVC video compression.…”

Section: Related Workmentioning

confidence: 99%

See 1 more Smart Citation

AMBER: Adaptive energy management for on-chip hybrid video memories

Khan

2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

Henkel

2013

Self Cite

The ever increasing leakage power of memories in a system has motivated researches for exploiting unconventional memory architectures. Non-Volatile Memory (NVM) used in conjunction with the conventional on-chip SRAMs has given birth to the hybrid memory paradigm, which can be intelligently exploited to reduce the energy consumption while tackling the high read and write latencies of NVMs. We present a novel scheme AMBER that aims at minimizing the total memory energy consumption of a video processing system by leveraging the application-specific properties and distinct latency and power properties of different memory types. AMBER also features architectural support for data-fetching from external memory and adaptively filling the different on-chip memories. We employ AMBER in the next-generation High Efficiency Video Coding (HEVC) standard to minimize the energy consumption of the new complex motion prediction process. Experimental results demonstrate that our AMBER scheme achieves significant energy savings (average 43%) for the on-chip memory.