Adhesive stabilised and pure flip chips on various substrates under thermocycling

Abstract

The paper presents numerical simulations and experimental investigations on flip chip modules having silicon, alumina ceramics, polyimide or polyester foil, or epoxy glass laminates as substrate material under thermo cycle test conditions. Some of the flip chip modules were stabilised additionally by filling the remaining gap between chip and substrate with an epoxy underfiller. The presented results concern the stress distribution in the joints as basis of their shape optimisation for the modules without underfiller as well as the evaluation of the metallographic cross-sections of the joints before and after the thermo cycles. Both, the simulations and the experiments, lead to the unambiguous result: The flip chip modules can be made reliable enough for industrial application in all cases with the help of the underfiller. IntroductionA main trend in micro packaging is the increase of chip integration density followed by the growing in the contact density. Another trend is the demand for ever increasing packaging density in multi chip modules and in micro systems. The flip chip (FC) technology is a very well-known solution considering both trends. Although the flip chip technology has been used only for very special and expensive purposes. Now intensive efforts can be noticed to reduce the cost and to overcome the incompatibilities with the mass production packaging lines. The use of cheaper substrates and the simplification of bumping and bonding processes are under development. So the flip chip technology is becoming a standard packaging technology for micro systems. In a few years, it will be used particularly in high-speed applications and to integrate sensors and actuators in compact micro systems -also for mass products in the low cost area. One of the main objectives of these efforts is the development of modules reliable enough to withstand the stress caused by thermal mismatch between the joined components during their whole lifetime. The paper describes simulations and experiments of thermocycling investigations of flip chip modules with various substrates and shows the influence of an underfiller, fixing the chips on the substrates additionally, on the reliability of the interconnections. Some ideas for minimising the mechanical stress in the modules are also given.The test structure TC14 (B6ttcher et al. 1991) was used for the investigations, whereby an area array of joints (BiSttcher, 1994) was included together with the original peripheral arrangement. The array allows an increase of the pitch from 180 gm to 360 ~tm which simplifies the fan out on a multilayer substrate. The silicon chips were 3.5 mm in square. The solder bumps of Sn60 Pb40 were electroplated on octagonal pads (width 100 ~tm) on chips and substrates. The bumps had a height after reflow of 50 ~tm. The substrates consisted of: -Silicon, 500 gm thick -typical for multi chip modules in micro systems, -alumina ceramics, 600 ~tm thick -traditional rigid substrate for the FC technology, -polyimide foil, 50 ~tm thick -flexible su...

Anisotropic Conductive Adhesives for Flip-Chip Interconnects

“…The stresses generated due to the CTE mismatch of the materials may lead to warpage [10] in the assembly. The thermally-induced warpage directly affects the interconnection between the chip and the substrate, causing poor integrity in the assembly [11]. During thermally-induced warpage, the conductive particles in the ACF, which provide the actual interconnection path, experience different types of stresses.…”

Measurements of solder bump lifetime as a function of underfill material properties

“…6(b) has not yet failed, although cracks in the solder material can clearly be observed. The investigations of the cross sections revealed that the solder material has separated into a "layered" structure of Snand Pb-rich phases, and it was discovered that cracking in most cases occur in the interface between the two phases [8], as illustrated by Fig. 6(a).…”

Modeling fatigue behavior of electronically conductive adhesive joints under elevated temperature and humidity conditions

“…Also, apart ftom the ahovementioned parameters, the presence of stresses in the form of residual stresses, or stresses developed during thermal cycling has a profound influence on the joint efficiency and its durability. In electronic devices, cyclic stress manifests itself through the thermal mismatch between the chip and the substrate, which in tum limits the lifetime of the joint [4,5, 6,7].…”