Adopting curvilinear shapes for production ILT: challenges and opportunities

Pearman, Ryan; Ungar, P. Jeffrey; Shirali, Nagesh; Shendre, Abishek; Niewczas, Mariusz; Pang, Leo; Fujimura, Aki

doi:10.1117/12.2538445

Cited by 11 publications

(9 citation statements)

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“…Mask rules for curvilinear patterns have turned out to be simpler than mask rules in Manhattan space: basically, they are minimum CD, minimum space, minimum area, and minimum curvature. 25 In this curvilinear ILT, such curvilinear mask rules are integrated into the ILT optimization, therefore, it produces mask-rule compliant (MRC)-clean results. Figure 11 shows an example of the mask patterns produced by this solution without and then with integrated MRC: when MRC is integrated, any features that violate minimum-feature rules do not appear in the final curvilinear ILT mask.…”

Section: Integrates Curvilinear Mask Rules To Produce Mrc Clean Resultsmentioning

confidence: 99%

Breakthrough curvilinear ILT enabled by multi-beam mask writing

Pang

Russell

Baggenstoss

et al. 2021

J. Micro/Nanopattern. Mats. Metro.

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Background: Multi-beam mask writers have been one of the most significant additions to the semiconductor manufacturing equipment arsenal in over a decade. The ability of multi-beam mask writers to write masks with a constant write time regardless of mask shapes or complexity has made them an eagerly anticipated advancement to help write curvilinear mask shapes for both today's advanced 193i nodes and for extreme ultra-violet (EUV) lithography in the future. Perhaps the most obvious application for these new pixel-based mask writers is the production of curvilinear inverse lithography technology (ILT) masks. ILT has been seen as a promising solution to many of the challenges of advanced-node lithography, whether optical or EUV. However, the runtimes and mask writing times associated with this computational technique have limited its practical application. Until recently, it had been used for critical "hotspots" on chips, but had not been used for entire chips.Aim: The introduction of multi-beam mask writing, along with the advent of graphics processing unit (GPU)-accelerated computing for mask and wafer, have enabled the introduction of a new approach to full-chip ILT using these new technologies. The goal was to produce full-chip, curvilinear ILT within the traditional turnaround times of mask shops. Approach:The solution to the runtime problem for ILT has been particularly vexing, as the traditional approach to runtime improvement-partitioning and stitching-has failed to produce satisfactory results, either in terms of runtime or in terms of quality. In 2019, D2S introduced an entirely new, stitchless approach, systematically designed for ILT, multi-beam mask writers, and GPU acceleration, that makes full-chip ILT a practical reality in production for the first time.Results: We present this new ILT approach, first introduced using a multi-beam mask writer to create the complex curvilinear mask shapes. We also review findings that targeting curvilinear mask shapes creates masks that are more resilient to manufacturing variation. Finally, we review the results of this new, stitchless full-chip curvilinear ILT as applied to memory chip making. We show mask making and wafer print results, including pattern fidelity and process window, to demonstrate the actual benefit of such technologies-a doubling in the wafer process windowfor semiconductor manufacturing.

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Section: Integrates Curvilinear Mask Rules To Produce Mrc Clean Resultsmentioning

confidence: 99%

Breakthrough curvilinear ILT enabled by multi-beam mask writing

Pang

Russell

Baggenstoss

et al. 2021

J. Micro/Nanopattern. Mats. Metro.

Self Cite

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“…Recently, after curvilinear full-chip ILT became a practical reality, mask rules for curvilinear ILT masks have become a hot topic. 118,[123][124][125][126][127][128][129] One implementation of mask rules has been proposed by D2S, based on the idea of two circles. 118 As shown in Fig.…”

Section: Curvilinear Mask Rulesmentioning

confidence: 99%

“…ILT is the best method for finding the optimized mask solution if you remove the Manhattan constraints. The evidence that curvilinear mask shapes are more reliably manufacturable 127,129,149 will lead the industry away from Manhattan assumptions and toward ILT. Dr. Ezequiel Russell from Micron showed that rectangular contacts have more visible variations on mask compared with oval contacts.…”

Section: Multibeam Mask Writing Will Accelerate the Adoption Of Curvilinear Iltmentioning

confidence: 99%

“…masks dominated by Manhattan shapes. Since resilience to manufacturing variation on the wafer is superior with curvilinear masks, 127,129,149 there will be no reason not to use curvilinear masks for EUV. However, VSB mask writers will still be the work horse for 193i lithography.…”

Section: I Ilt and Lithography Will Benefit Greatly From Mwco Using Overlapping Shotsmentioning

confidence: 99%

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Inverse lithography technology: 30 years from concept to practical, full-chip reality

Pang

2021

J. Micro/Nanopattern. Mats. Metro.

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In lithography, optical proximity and process bias/effects need to be corrected to achieve the best wafer print. Efforts to correct for these effects started with a simple bias, adding a hammer head in line-ends to prevent line-end shortening. This first-generation correction was called rule-based optical proximity correction (OPC). Then, as chip feature sizes continued to shrink, OPC became more complicated and evolved to a model-based approach. Some extra patterns were added to masks, to improve the wafer process window, a measure of resilience to manufacturing variation. Around this time, the concept of inverse lithography technology (ILT), a mathematically rigorous inverse approach that determines the mask shapes that will produce the desired on-wafer results, was introduced. ILT has been explored and developed over the last three decades as the next generation of OPC, promising a solution to several challenges of advanced-node lithography, whether optical or extreme ultraviolet (EUV). Today, both OPC and ILT are part of an arsenal of lithography technologies called resolution enhancement technologies. Since OPC and ILT both involve computation, they are also considered as part of computational lithography. We explore the background and history of ILT and detail the significant milestones that have taken full-chip ILT from an academic concept to a practical production reality.

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“…ILT is a technique to maximize process window on wafer [1][2]. It essentially creates curvilinear shapes, which makes it difficult to realize high-volume manufacturing because of the writing time explosion of mask.…”

Section: Introductionmentioning

confidence: 99%

Improvements on pattern fidelity at high curvature region of curvilinear mask with a novel method of MPC

Kaneko,

Fujii,

Ono

et al. 2023

Photomask Technology 2023

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Adopting curvilinear shapes for production ILT: challenges and opportunities

Cited by 11 publications

References 0 publications

Breakthrough curvilinear ILT enabled by multi-beam mask writing

Breakthrough curvilinear ILT enabled by multi-beam mask writing

Inverse lithography technology: 30 years from concept to practical, full-chip reality

Improvements on pattern fidelity at high curvature region of curvilinear mask with a novel method of MPC

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