Advances in 3D CMOS sequential integration

Batude, P.; Vinet, M.; Pouydebasque, A.; Royer, C. Le; Prévitali, B.; Tabone, C.; Hartmann, J.-M.; Sanchez, L.; Baud, L.; Carron, V.; Toffoli, A.; Allain, F.; Mazzocchi, V.; Lafond, D.; Thomas, Olivier; Cueto, O.; Bouzaida, N.; Fleury, Dominique; Amara, Ayed Ben; Deleonibus, S.; Faynot, O.

doi:10.1109/iedm.2009.5424352

Cited by 108 publications

(58 citation statements)

References 3 publications

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“…Phases with bandgaps above 4.0 eV have intrinsic breakdown voltages exceed 1.36 V/nm, i.e. they meet the working voltage requirement in Intel's first 22nm-based 3-D transistors and other CMOS devices (Batude et al, 2009). We note, however, that bandgaps (and breakdown voltages) based on density-functional calculations are always underestimated, usually by 10-40%.…”

Section: Resultsmentioning

confidence: 91%

Evolutionary search for new high-kdielectric materials: methodology and applications to hafnia-based oxides

Zeng

Oganov

Lyakhov

et al. 2014

Acta Crystallogr C Struct Chem

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High-k dielectric materials are important as gate oxides in microelectronics and as potential dielectrics for capacitors. In order to enable computational discovery of novel high-k dielectric materials, we propose a fitness model (energy storage density) that includes the dielectric constant, bandgap, and intrinsic breakdown field. This model, used as fitness function in conjunction with first-principles calculations and global optimization evolutionary algorithm USPEX, efficiently leads to practically important results. We found a number of high-fitness structures of SiO 2 and HfO 2 , some of which correspond to known phases and some are new. The results allow us to propose characteristics (genes) common to high-fitness structures -these are the coordination polyhedra and their degree of distortion. Our variable-composition searches in the HfO 2 -SiO 2 system uncovered several high-fitness states. This hybrid algorithm opens up a new avenue of discovering novel high-k dielectrics with both fixed and variable compositions, and will speed up the process of materials discovery.

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Section: Resultsmentioning

confidence: 91%

Evolutionary search for new high-kdielectric materials: methodology and applications to hafnia-based oxides

Zeng

Oganov

Lyakhov

et al. 2014

Acta Crystallogr C Struct Chem

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“…Currently, Solid Phase Epitaxy (SPE) at 600 • C has been demonstrated to be a viable option for dopant activation [Batude et al 2009a]. The bottom transistor can endure such low thermal budget (600 • C) at the exception of classical NiSi silicide that needs to be stabilized [Batude et al 2008a].…”

Section: D Monolithic Technologymentioning

confidence: 99%

“…The latest advancement in 3DMI technology, with active layers being processed at low temperatures, has created substantial interest among various researchers [Batude et al 2009a]. 3DMI technology promises very small 3D contacts in the order of a few 100nm [Jung et al 2007], thereby enabling circuit partitioning at a fine granularity.…”

Section: Previous Work In 3d Monolithic Integrated Circuitsmentioning

confidence: 99%

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Cell transformations and physical design techniques for 3D monolithic integrated circuits

Bobba

Chakraborty

Thomas

et al. 2013

J. Emerg. Technol. Comput. Syst.

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3D Monolithic Integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. In 3DMI technology the 3D contacts, connecting different active layers, are in the order of few 100nm. Given the advantage of such small contacts, 3DMI enables fine-grain (gate-level) partitioning of circuits. In this work we present three cell transformation techniques for standard cell-based ICs with 3DMI technology. As a major contribution of this work, we propose a design flow comprising of a cell transformation technique, cell-on-cell stacking, and a physical design technique (CELONCEL PD ) aimed at placing cells transformed with cell-on-cell stacking. We analyze and compare various cell transformation techniques for 3DMI technology without disrupting the regularity of the IC design flow. Our experiments demonstrate the effectiveness of CELONCEL design technique, yielding us an area reduction of 37.5%, 16.2% average reduction in wirelength, and 6.2% average improvement in overall delay, compared with a 2D case when benchmarked across various designs in 45nm technology node.

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“…The capability of low temperature processing makes MWA extraordinarily appealing, especially in the formation and activation of source/drain regions for future ultra-scaled MOSFETs in sub-14 nm nodes 11 and emerging monolithic 3D sequential integrations. 12 Hence, an in-depth understanding of the mechanism and an accurate model of MWA of Si are of paramount importance and urgency. The interaction of MWA with silicon can be categorized into thermal effects and non-thermal effects; 1,13 the latter is still controversial to a certain extent.…”

Section: Introductionmentioning

confidence: 99%

Understanding the microwave annealing of silicon

Wang

et al. 2017

AIP Advances

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Though microwave annealing appears to be very appealing due to its unique features, lacking an in-depth understanding and accurate model hinder its application in semiconductor processing. In this paper, the physics-based model and accurate calculation for the microwave annealing of silicon are presented. Both thermal effects, including ohmic conduction loss and dielectric polarization loss, and non-thermal effects are thoroughly analyzed. We designed unique experiments to verify the mechanism and extract relevant parameters. We also explicitly illustrate the dynamic interaction processes of the microwave annealing of silicon. This work provides an in-depth understanding that can expedite the application of microwave annealing in semiconductor processing and open the door to implementing microwave annealing for future research and applications.

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Advances in 3D CMOS sequential integration

Cited by 108 publications

References 3 publications

Evolutionary search for new high-kdielectric materials: methodology and applications to hafnia-based oxides

Evolutionary search for new high-kdielectric materials: methodology and applications to hafnia-based oxides

Cell transformations and physical design techniques for 3D monolithic integrated circuits

Understanding the microwave annealing of silicon

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