2007 International Microsystems, Packaging, Assembly and Circuits Technology 2007
DOI: 10.1109/impact.2007.4433633
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Advantage and challenge of coreless flip-chip BGA

Abstract: This paper described the shadow moiré measurement of bare flip chip coreless and standard (3/2/3) BGA substrate to inspect the change of each thermal history (0hr, after pre-baking, IR-reflow), the warpage increased significantly on IR reflow peak temperature and largest warpage located around the C4 area of coreless FCBGA substrate and standard FCBGA substrate change was not obvious. Electrical performance was simulated by Ansoft Q3D and HFSS software, the coreless flip chip BGA substrate showed higher insert… Show more

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Cited by 11 publications
(3 citation statements)
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“…Despite many technical challenges, ultra thin or coreless substrate has been studied for its capabilities for high-end flip-chip BGA (Ball Grid Array) applications. 4,5) Robert Sung compares the coreless (6 layers or 4 layers) and the standard (6 layers, 0.8 mm core layer) flip-chip substrate from the viewpoint of electrical performance.…”
Section: )mentioning
confidence: 99%
“…Despite many technical challenges, ultra thin or coreless substrate has been studied for its capabilities for high-end flip-chip BGA (Ball Grid Array) applications. 4,5) Robert Sung compares the coreless (6 layers or 4 layers) and the standard (6 layers, 0.8 mm core layer) flip-chip substrate from the viewpoint of electrical performance.…”
Section: )mentioning
confidence: 99%
“…Accordingly, the electrical properties between the chip and the PCB must be optimized if new technologies are to be implemented successfully. Thin core or coreless PCB has been developed to meet both high density interconnection and high electrical performance requirements for the Flip Chip Ball Grid Array (FCBGA) PCB [1,2]. Nevertheless, warpage is one of most difficult issues to develop thin core or coreless PCBs.…”
Section: Introductionmentioning
confidence: 99%
“…[8][9] 특히, 최근 FCCSP 기판의 코어두께가 감소하거나 코어가 없는 코어리스 구조가 확대되면서 기판의 warpage 가 증가하고 있으며 이러한 warpage는 패키지의 신뢰성불 량과 생산성 하락에 근원적 원인이 되고 있다. [10][11] FCCSP용 Table 2~Table 4와 같은 기판의 설계인자 조건 참고문헌…”
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