This paper described the shadow moiré measurement of bare flip chip coreless and standard (3/2/3) BGA substrate to inspect the change of each thermal history (0hr, after pre-baking, IR-reflow), the warpage increased significantly on IR reflow peak temperature and largest warpage located around the C4 area of coreless FCBGA substrate and standard FCBGA substrate change was not obvious. Electrical performance was simulated by Ansoft Q3D and HFSS software, the coreless flip chip BGA substrate showed higher insertion loss and lower return loss than standard (3/2/3) flip chip BGA substrate. Bump stress, die stress and Cu trace stress of substrate were simulated by FEA (Finite Element Analysis) method, the results indicate that coreless flip chip BGA performs lower die stress and bump stress and higher trace stress than standard (3/2/3) flip-chip BGA. Furthermore, this study also found out the optimal assembly process condition. For the reliability evaluation, all of packages were subjected to pre-condition of JEDEC Level 3, TCT (Temperature Cycling Test), HTSL (High temperature Storage Life) and HAST (High accelerated stress test) and the results showed passed.

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In this study, the reliability of the solder joints of a heterogeneous integration of one large chip (10 × 10 mm) and two smaller chips (7 × 5 mm) by a fan-out method with a redistribution layer-first substrate fabricated on a 515 × 510-mm panel is investigated. Emphasis is placed on the thermal cycling test (−55°C Δ 125°C, 50-min cycle) of the heterogeneous integration package on a printed circuit board (PCB). The thermal cycling test results are plotted into a Weibull distribution. The Weibull slope and characteristic life at median rank are presented. At 90% confidence, the true Weibull slope and the true 10% life interval are also provided. A linear acceleration factor is adopted to map the solder joint reliability at the test condition to the solder joint reliability at an operating condition. The failure location and failure mode of the PCB assembly of the heterogeneous integration package are provided and discussed. A nonlinear, time- and temperature-dependent 3-D finite element simulation is performed for the heterogeneous integration PCB assembly and correlated with the thermal cycling test results.

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