Algorithm and software for simulation of spiking neural networks on the multi-chip SpiNNaker system

Jin, Xin; Galluppi, Francesco; Patterson, Cameron; Rast, Alexander; Davies, Sergio; Temple, Steve; Furber, Steve

doi:10.1109/ijcnn.2010.5596759

Cited by 14 publications

(19 citation statements)

References 10 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Two recent notable projects with similar aims are PyNN [20] and the SpiNNaker project [21]. Our breakthrough neurosynaptic core is the first of its kind in working silicon to integrate neurons, dense synapses, and communication on chip, leading to ultra-low active power in a dense technology, while simultaneously demonstrating one-to-one correspondence with a determinstic neural programming model.…”

Section: Discussionmentioning

confidence: 99%

Building block of a programmable neuromorphic substrate: A digital neurosynaptic core

Arthur

Merolla

Akopyan

et al. 2012

The 2012 International Joint Conference on Neural Networks (IJCNN)

111

View full text Add to dashboard Cite

Abstract-The grand challenge of neuromorphic computation is to develop a flexible brain-like architecture capable of a wide array of real-time applications, while striving towards the ultra-low power consumption and compact size of biological neural systems. To this end, we fabricated a key building block of a modular neuromorphic architecture, a neurosynaptic core. Our implementation consists of 256 integrate-and-fire neurons and a 1,024×256 SRAM crossbar memory for synapses that fits in 4.2mm 2 using a 45nm SOI process and consumes just 45pJ per spike. The core is fully configurable in terms of neuron parameters, axon types, and synapse states and its fully digital implementation achieves one-to-one correspondence with software simulation models. One-to-one correspondence allows us to introduce an abstract neural programming model for our chip, a contract guaranteeing that any application developed in software functions identically in hardware. This contract allows us to rapidly test and map applications from control, machine vision, and classification. To demonstrate, we present four test cases (i) a robot driving in a virtual environment, (ii) the classic game of pong, (iii) visual digit recognition and (iv) an autoassociative memory.

show abstract

Section: Discussionmentioning

confidence: 99%

Building block of a programmable neuromorphic substrate: A digital neurosynaptic core

Arthur

Merolla

Akopyan

et al. 2012

The 2012 International Joint Conference on Neural Networks (IJCNN)

111

View full text Add to dashboard Cite

show abstract

“…When an interrupt is received, the processor performs the required actions to respond to the interrupt request and then returns to sleep. Details of the software architecture have been described in various publications: [15] [20] [21]. It is important to note that the number of neurons that each core is able to simulate within the real-time constraint varies with the computational complexity of the neuron model itself and with the connectivity pattern required [22].…”

Section: B Softwarementioning

confidence: 99%

Population-based routing in the SpiNNaker neuromorphic architecture

Davies

Navaridas

Galluppi

et al. 2012

The 2012 International Joint Conference on Neural Networks (IJCNN)

Self Cite

View full text Add to dashboard Cite

Abstract-SpiNNaker is a hardware-based massively-parallel real-time universal neural network simulator designed to simulate large-scale spiking neural networks. Spikes are distributed across the system using a multicast packet router. Each packet represents an event (spike) generated by a neuron. On the basis of the source of the spike (chip, core and neuron), the routers distribute the network packet across the system towards the destination neuron(s). This paper describes a novel approach to the projection routing problem that shows advantages in both the size of the routing tables generated and the computational complexity for the generation of routing tables. To achieve this, spikes are routed on the basis of the source population, leaving to the destination core the duty to propagate the received spike to the appropriate neuron(s).

show abstract

“…This memory system guarantees a good balance between the memory space and the accessing speed. Detailed description of SpiNNaker can be found in [6], [8], [7], [12], [11].…”

Section: A the Pre-post-sensitive Schemementioning

confidence: 99%

Implementing spike-timing-dependent plasticity on SpiNNaker neuromorphic hardware

Jin

Rast

Galluppi

et al. 2010

The 2010 International Joint Conference on Neural Networks (IJCNN)

Self Cite

View full text Add to dashboard Cite

Abstract-This paper presents an efficient approach for implementing spike-timing-dependent plasticity (STDP) on the SpiNNaker neuromorphic hardware. The event-address mapping and the distributed synaptic weight storage schemes used in parallel neuromorphic hardware such as SpiNNaker make the conventional pre-post-sensitive scheme of STDP implementation inefficient, since STDP is triggered when either a pre-or post-synaptic neuron fires. An alternative pre-sensitive scheme approach is presented to solve this problem, where STDP is triggered only when a pre-synaptic neuron fires. An associated deferred event-driven model is developed to enable the presensitive scheme by deferring the STDP process until there are sufficient history spike timing records. The paper gives detailed description of the implementation as well as performance estimation of STDP on multi-chip SpiNNaker machine, along with the discussion on some issues related to efficient STDP implementation on a parallel neuromorphic hardware.

show abstract

Algorithm and software for simulation of spiking neural networks on the multi-chip SpiNNaker system

Cited by 14 publications

References 10 publications

Building block of a programmable neuromorphic substrate: A digital neurosynaptic core

Building block of a programmable neuromorphic substrate: A digital neurosynaptic core

Population-based routing in the SpiNNaker neuromorphic architecture

Implementing spike-timing-dependent plasticity on SpiNNaker neuromorphic hardware

Contact Info

Product

Resources

About