Ambipolar Conduction Behavior on High Performance Schottky Barrier Source/Drain Gate-All-Around Si Nanowire Nonvolatile SONOS Memory

Ho, Ching Yuan; Chang, Yaw-Jen; Lee, C. C.; Chang, Wei Ting; Wang, H. W.; Yuan, Kun

doi:10.1149/2.019205jss

Cited by 3 publications

(1 citation statement)

References 21 publications

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“…The observed memory window is lower compared to the conventional nonvolatile SONOS flash memories or other nonvolatile Schottky barrier transistors using nanomaterials. [23][24][25][26] The results obtained in our reconfigurable transistor can be attributed to the thick SiO 2 tunnel layer and the absence of a block oxide between the silicon nitride layer and the gate metal. Much thinner tunnel oxide together with a top oxide will allow us to fully reconfigure the device in a nonvolatile fashion with smaller program and erase voltages.…”

Section: Wwwadvelectronicmatdementioning

confidence: 76%

Reconfigurable Si Nanowire Nonvolatile Transistors

Park

Jeon

Piontek

et al. 2017

Adv Elect Materials

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circuits. [2,3] The fine-grain reconfiguration approaches aim at the reduction of routingrelated delays and chip area reduction. A very interesting fine-grain approach that emerged during the last decade is based on polarity programmable or reconfigurable field-effect transistors (RFETs). RFETs have been highlighted due to their novel functionality providing both n-type and p-type field-effect transistor (FET) function in a single device selected simply by an electric signal. [4][5][6][7][8][9] Up to date, reconfigurable transistors have been limited to dynamic programming on the function, i.e., a constant program signal needs to be applied to maintain the required function.However, a nonvolatile component that can be embedded into these reconfigurable logic devices would not only eliminate the requirement of having the configuration voltage applied continuously but would also bring additional advantages in terms of multivalent memory operation and close proximity between memory and logic. A number of demonstrations of nanowire-based nonvolatile memory cells have been reported in literature. [10][11][12] In these realizations, the channel polarity of the memory cell is determined by the doping type of silicon. First demonstrators of nonvolatile reconfigurable device operation were shown with the use of a common back gate electrode; [13] in the work by Schwalke et al., the charge trapping is performed using the buried oxide while a high voltage is applied to the global back gate. With this approach, it is difficult to individually address the desired device and to perform other operations in the chip, while writing/erasing some of the devices. Recently, a poly-Si reconfigurable device with a bottom gate array was also demonstrated and showed nonvolatile functionality. [14] In this work, the first demonstration of individually addressable nonvolatile RFETs based on bottom-up grown Si nanowire is presented. Figure 1 shows a schematic design and a crosssectional transmission electron micrograph (TEM) image of the fabricated and measured device. We make use of charge trapping in the gate stack of a dedicated gate electrode. As a vehicle to verify our proof of principle, we integrated the technologically lean charge trapping metal-nitride-oxide-silicon (MNOS) gate stack. The validity of the MNOS stack for nonvolatile charge storage, in general, is well accepted in the memory community. [15,16] For simplicity, in demonstrating the concept, we use a rather thick Si 3 N 4 layer of 15 nm and omit the use of a top blocking oxide. In this configuration, the top part of the thick trapping layer has the same electrostatic function as the blocking oxide in the silicon-oxide-nitride-oxide-silicon Reconfigurable transistors merge unipolar p-and n-type characteristics of field-effect transistors into a single programmable device. Combinational circuits have shown benefits in area and power consumption by fine-grain reconfiguration of complete logic blocks at runtime. To complement this volatile programming technology, a proof of ...

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Section: Wwwadvelectronicmatdementioning

confidence: 76%

Reconfigurable Si Nanowire Nonvolatile Transistors

Park

Jeon

Piontek

et al. 2017

Adv Elect Materials

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Evaluation of Schottky barrier source/drain contact on gate-all-around polycrystalline silicon nanowire MOSFET

Chang

2017

Materials Science in Semiconductor Processing

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DS Schottky barrier cylindrical GAA MOSFET: nanosensor for biochips

KumarManoj¹,

HaldarSubhasis²,

GuptaMridula³

et al. 2016

Nanomaterials and Energy

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This paper presents an extensive mathematical study of a proposed nanogap-embedded dopant-segregated (DS) Schottky barrier (SB) cylindrical gate all-around (CGAA) metal-oxide-semiconductor field-effect transistor (MOSFET) of negatively/positively charged and neutral species observed by numerical simulation using an Atlas three-dimensional device simulator for electrical and label-free detection of bio/chemical (DNA, pH) and neutral species (protein) respectively as a nanosensor in the biomedical field at high sensitivity for direct electronic readout. This is the first time that the use of a nanogap-embedded DS-SB-CGAA MOSFET as a bio/chemical sensor has been reported. The threshold voltage (V th) shift and change in current are considered as sensing metrics to detect biological or chemical species when they are immobilized in the carvel-built region. The shift in on current (I on) of the nanogap-embedded DS-SB-CGAA MOSFET is also taken as a sensing metric, and better performance is observed compared to a conventional SB-CGAA MOSFET sensor. It is advantageous in terms of its low power/energy consumption as well as from the point of view of integration with the forthcoming silicon-based lab-on-chip systems due to the compatibility with the complementary metal-oxide semiconductor process.

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Ambipolar Conduction Behavior on High Performance Schottky Barrier Source/Drain Gate-All-Around Si Nanowire Nonvolatile SONOS Memory

Cited by 3 publications

References 21 publications

Reconfigurable Si Nanowire Nonvolatile Transistors

Reconfigurable Si Nanowire Nonvolatile Transistors

Evaluation of Schottky barrier source/drain contact on gate-all-around polycrystalline silicon nanowire MOSFET

DS Schottky barrier cylindrical GAA MOSFET: nanosensor for biochips

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