Amorphous Silicon Film Deposition by Low Temperature Catalytic Chemical Vapor Deposition (<150 °C) and Laser Crystallization for Polycrystalline Silicon Thin-Film Transistor Application

Abstract

We deposited amorphous silicon (a-Si) films below 150 C with a custom-designed catalytic chemical vapor deposition (Cat-CVD) system. The hydrogen content of the films was controlled at less than 1.5 at. %. Excimer laser crystallization was performed without the preliminary dehydrogenation process. Crystallization occurred at a laser energy density above 70 mJ/ cm 2. Thin-film transistors (TFTs) were fabricated while the entire process temperatures were maintained at below 200 C. We obtained a field-effect mobility of higher than 100 cm 2 /(V s) and a sub-threshold slope of 116 mV/dec. The a-Si film prepared by a low temperature Cat-CVD is a promising candidate for polycrystalline silicon TFTs of the active matrix display.

Polysilicon thin-film transistors on polymer substrates

“…Different techniques able to provide a-Si precursor with reduced H-content have been also proposed, including ionbeam deposition, which contained no hydrogen but a 0.2 at% of Ar [38], catalytic CVD, which provided a-Si precursor containing 1.5 at% of H, a low enough concentration to allow direct excimer laser annealing [39] or inductively coupled plasma (ICP) CVD, which allowed to obtain a-Si precursor containing 3.8 at% of H [40]. However, the use of a-Si:H precursor deposited by PECVD remains the most attractive solution, being a well-established technology with mass production equipment available.…”

Gate Insulator Inhomogeneity in Thin Film Transistors Having a Polycrystalline Silicon Layer Prepared Directly by Catalytic Chemical Vapor Deposition at a Low Temperature

“…The fabrication process of the ELA poly-Si TFT was described elsewhere. 6) In this case, the gate dielectric layer was deposited by ICP-CVD at 170 C. The ELA poly-Si TFT showed a V th of 2 V which is much lower than that of the direct poly-Si TFT. A cross sectional TEM image of the ELA poly-Si TFT is shown in Fig.…”

“…Cross sectional TEM image showing packed grains on the surface of the laser-crystallized poly-Si and homogeneous gate dielectric layer 6). …”

“…[1][2][3][4] Currently, the poly-Si films for flat panel display manufacturing are fabricated on glass substrates by the two-stage process of amorphous film deposition followed by laser annealing. 5,6) Since the laser annealing is a tedious step, a lot of research efforts have been devoted to form crystalline phase in a single step at a low temperature using various chemical vapor deposition (CVD) techniques. 2,7,8) Also, as display and sensor arrays on flexible substrates emerge as novel applications recently, thin film deposition temperatures are mandated to be lowered below the glass transition point of plastic substrates.…”

“…Therefore, in order to improve the performance of the low temperature direct poly-Si TFTs, it is very important to obtain packed grains on the poly-Si surface not only to minimize the grain boundary scattering of the charge carriers, but also to grow a uniform and homogeneous gate dielectric layer. 3,6) In summary, poly-Si films were grown at a temperature that is low enough to use PES as a substrate by using the Cat-CVD technique. The substrate was held initially at RT, and the temperature rise during the deposition process was successfully controlled not to exceed 200 C. Top-gate TFTs were fabricated on glass substrates by using the lowtemperature direct poly-Si and ICP-CVD SiO 2 films.…”