An 18.39 fJ/Conversion-Step 1-MS/s 12-bit SAR ADC With Non-Binary Multiple-LSB-Redundant and Non-Integer-and-Split-Capacitor DAC

Abstract

A low-power 12-bit successive approximation register (SAR) analog-to-digital converter (ADC) with split-capacitor, nonbinary-weighted, and multiple-least-significant-bit (LSB)-redundant capacitor digital-to-analog converters (CDACs) is proposed. The proposed SAR ADC with nonbinaryweighted and multiple-LSB-redundant CDACs has an optimal mechanism for correcting the bit error decisions due to noise and incomplete digital-to-analog converter (DAC) switching settling. To reduce the total capacitance, all capacitor values of the 12-bit DAC were divided by 16, and a parallel-series capacitor scheme was used to implement these noninteger capacitors. The 12-bit SAR ADC prototype was fabricated using 0.18-μm 1P6M complementary metal oxide semiconductor technology. The maximal differential nonlinearity and integral nonlinearity were measured as −0.4/0.54 and −0.81/0.89 LSB, respectively, where 1 LSB = 0.488 mV. The signal-to-noise-and-distortion ratio and effective number of bits were 69.51 dB and 11.25 bits, respectively, for the input frequency of 500 kHz and sampling rate of 1 MS/s. The proposed SAR ADC features an 18.39-fJ/conversion-step Figure-of-Merit (FoM) at the sampling rate of 1 MS/s. INDEX TERMS SAR ADC, non-binary-weighted CDAC, multiple-LSB redundant CDAC.

A low-power 8-bit 1-MS/s single-ended SAR ADC in 130-nm CMOS for medical devices

“…27 with an active area of 196.9420 × 376.71 80 = 74,191.5964 μm 2 . The performance of the proposed SAR ADC and work [14][15][16][17][18][19][20] is listed in Table 3. For the comparison to be fair enough, the resolution of most work in Table 3 is 8-bit and the sampling rate is 1 MS/s.…”

“…Successive approximation register (SAR) analog-to-digital converters (ADCs) are commonly the design of choice for good resolution with low-power applications. These ADCs are perfected for a wide range of applications including portable/battery-powered devices due to their low-power consumption [10][11][12][13][14][15][16][17][18][19][20][21].…”