An 18mW 90 to 770MHz synthesizer with agile auto-tuning for digital TV-tuners

Marutani, Masazumi; Anbutsu, H.; Masafumi, Kondo; Shirai, Noriaki; Yamazaki, Hiroshi; Watanabe, Y.

doi:10.1109/isscc.2006.1696107

Cited by 34 publications

(22 citation statements)

References 2 publications

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“…The proposed synthesizer dissipates up to 33.5 mW from a 1.8-V supply, which is only 1/5 of that dissipated by the conventional single-VCO synthesizers used in digital TV tuners [6]. The detailed performance results are summarized and compared with other recently published synthesizers [1,2,6,7] in Table I. [1] uses three VCOs and consumes 47 mW to cover a frequency range from 430 to 1000 MHz.…”

Section: Resultsmentioning

confidence: 99%

“…[1] uses three VCOs and consumes 47 mW to cover a frequency range from 430 to 1000 MHz. [2] uses two VCOs and consumes around 20 mW with a largest die area of about 1.9 mm 2 to cover a frequency range from 90 to 770 MHz. [7] introduced a new carrier generation technique using a bimodal quadrature oscillator and three divider changes to produce carrier frequencies in the range of 1 to 10 GHz.…”

Section: Resultsmentioning

confidence: 99%

“…In order to support these standards simultaneously, multiple LC-tank VCOs (LC VCOs) and complex LO frequency generation techniques are usually required for multiple frequency generation [1,2,3]. Since these conventional synthesizer architectures may increase the chip size and power consumption, these are not suitable for use in hand-held mobile TV tuner ICs that demand low power as well as compact silicon area.…”

Section: Introductionmentioning

confidence: 99%

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A low-power wideband multi-frequency synthesizer for mobile TV tuner ICs

Kim

2010

IEICE Electron. Express

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Abstract:A low-power wideband frequency synthesizer that generates multiple LO frequencies for mobile TV tuner ICs is presented. The synthesizer utilizes a single on-chip LC VCO and an odd-order frequency division technique to achieve both low power and small silicon area. The integrated LC VCO has a tuning range of 2.3 to 3.85 GHz. With a division ratio of 2, 4, 6, 12, 16, 24, and 32, the LO generation block supports FM, VHF III, UHF, Europe-L, and USA-L bands. The measured LO phase noise for the L-band is under −79 dBc/Hz at an offset of 10 kHz. The synthesizer implemented in 0.18-µm CMOS technology occupies an area of about 1.2 mm 2 and dissipates up to 33.5 mW from a 1.8-V supply.

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Section: Resultsmentioning

confidence: 99%

Section: Resultsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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A low-power wideband multi-frequency synthesizer for mobile TV tuner ICs

Kim

2010

IEICE Electron. Express

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“…This paper illustrates architecture and circuit techniques to achieve 15 μsec start-up time applicable to accurate fractional-N PLL synthesizers. In previous publications on the acceleration of the PLL start-up, a closedloop auto-tuning method based on frequency detection and subsequent VCO capacitor coarse tuning with a binary-search algorithm has been proposed [3]. Even with an unequal interval gating scheme to handle asynchronous counting errors between VCO and reference clocks as well as a proactive judgment of frequency detection, the start-up time cannot be reduced less than 80 μsec.…”

Section: Introductionmentioning

confidence: 99%

Fractional-N PLL synthesizer with 15µsec start-up time by on-chip nonvolatile memory

Lee

Masui

2012

IEICE Electron. Express

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Abstract:We propose a fractional-N PLL synthesizer with 15 μsec start-up time featuring an open-loop VCO capacitor coarse setting and subsequent VCO control voltage setting technique with a nonvolatile memory, which can eliminate the frequency detection and VCO coarse tuning sequence used in conventional start-up acceleration techniques. The on-chip nonvolatile memory fabricated in a standard CMOS technology stores the predetermined calibration data to overcome the process variations in VCO capacitors and varactors. A prototype PLL is designed in a standard 0.18 μm CMOS technology with die size of 950 μm x 515 μm and 10.4% area overhead of the acceleration circuits, and presents the measured start-up time of 14.6 μsec.

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“…The parasitic capacitances and the capacitive load of the following stages impose a constraint on the maximum value of the inductor. Therefore, the current needed to sustain acceptable oscillation amplitude would be prohibitively high at the lower end frequency [7].…”

Section: Introductionmentioning

confidence: 99%

Single-VCO multi-band DTV frequency synthesizer with a divide-by-3 frequency divider for quadrature signal generation

Saeedi

Atarodi

2009

Analog Integr Circ Sig Process

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A multi-band frequency synthesizer for Inphase and Quadrature (I/Q) LO signal generation in Digital TV tuners is presented. Using divisor numbers other than powers of 2 (2 n ) for quadrature generation, reduces the required frequency range of the VCO, hence the number of VCO circuits, in multi-band frequency synthesizers. In the proposed synthesizer, VHF, UHF and L-band frequencies are covered with only one VCO. This is achieved by using a novel divide-by-3 circuit which produces precise I/Q LO signals. The VCO tuning range in this design is 2,400-3,632 MHz which is covered by a 6-bit switched-capacitor bank. A fast adaptive frequency calibration block selects the closest VCO frequency to the target frequency by setting the coarse-tuning code prior to the start of phase lock. A programmable charge pump is used to reduce variations in PLL characteristics over the frequency range. The synthesizer has been fabricated in a 0.18 lm CMOS technology and the die area is 1.7 9 1.6 mm 2 . It consumes 27 mA from a 1.8 V power supply. Measurement results show operation of the proposed divide-by-3 circuit over the entire VCO frequency range. The synthesizer quadrature output phase noise for UHF and VHF bands is \-131dBc/ Hz at 1.45 MHz offset.

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An 18mW 90 to 770MHz synthesizer with agile auto-tuning for digital TV-tuners

Cited by 34 publications

References 2 publications

A low-power wideband multi-frequency synthesizer for mobile TV tuner ICs

A low-power wideband multi-frequency synthesizer for mobile TV tuner ICs

Fractional-N PLL synthesizer with 15µsec start-up time by on-chip nonvolatile memory

Single-VCO multi-band DTV frequency synthesizer with a divide-by-3 frequency divider for quadrature signal generation

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