An 8 GS/s 20 GHz bandwidth master‐slave track‐and‐hold amplifier in 65 nm CMOS

Abstract

A 65 nm CMOS fully-differential track-and-hold amplifier (THA) in master-slave configuration is presented. For highspeed operation, Cherry-Hooper amplifier with input inductive-peaking and switched-source follower (SSF) circuit are used for the front-end preamplifier and master/slave track-and-hold circuits, respectively. On-wafer testing in single-ended input/output configuration shows that the fabricated THA exhibits 20 GHz switched-mode bandwidth and 11.9 dB conversion gain at 8 GS/s clock, with THD < −36 dB and SFDR >36 dB within the 3-dB bandwidth, while consuming 361 mW of dc power at 2.6 V supply. This work represents the highest input bandwidth for master-slave THA in CMOS, to the best of authors' knowledge. The chip area is 0.681 mm 2 including pads (active chip area: 0.2 mm 2 ). K E Y W O R D Shigh speed sampling, master-slave THAs, sampling circuits, switched source follower, track and hold amplifier