An 802.11g WLAN SoC

Mehta, S.; Weber, D.; Terrovitis, Manolis; Onodera, K.; Mack, M.; Kaczynski, B.; Samavati, H.; Jen, S.H.; Si, W.W.; Lee, MeeLan; Singh, None Dr. K. B.; Mendis, S.; Husted, P.; Zhang, Ning; McFarland, B.; Su, D.K.; Meng, Tao; Wooley, B.A.

doi:10.1109/jssc.2005.857418

Cited by 52 publications

(5 citation statements)

References 6 publications

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“…The LPF suppression depends on the type of the LPF and on f. For example, consider a fourth order Butterworth LPF with 3 dB bandwidth of 11 MHz, commonly used in WLAN receivers [40,41]. For f = 30 MHz, the suppression at 30 MHz is about 30 dB.…”

Section: Baseline Receivermentioning

confidence: 99%

System study on nonlinear suppression of varying-envelope local interference in multimode transceivers

Habibi

Janssen

et al. 2015

AEU - International Journal of Electronics and Communications

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Section: Baseline Receivermentioning

confidence: 99%

System study on nonlinear suppression of varying-envelope local interference in multimode transceivers

Habibi

Janssen

et al. 2015

AEU - International Journal of Electronics and Communications

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“…The first calibration method, which was based on the power detector, is used in Refs. [7][8][9]; it requires an RF power detector, which leads to high complexity and larger area. The second method for calibrating I/Q mismatch is based on an analog-to-digital (AD) convertor and digital-to-analog (DA) convertor as shown in Refs.…”

Section: Introductionmentioning

confidence: 99%

I/Q mismatch calibration based on digital baseband

Lei¹,

Erhu²,

Fang³

et al. 2013

J. Semicond.

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A novel I/Q mismatch calibration technique based on a digital baseband for a direct conversion transmitter is implemented in TSMC 0.13 m CMOS technology. The proposed technique finishes a calibration task, which only needs a calibration chain to detect mismatches and then transmit them to the digital baseband. Simulation results show that the calibrated errors of the proposed technique are less than 7%. The measurement results indicate the function of the proposed technique is correct, but the performance should be improved further.

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“…This trade-off is presently optimized with a DAC data-rate about 8-10 times the signal bandwidth and a 4-6th order analog reconstruction filter. For instance, in the case of the WLAN IEEE 802.11a standard (whose signal bandwidth is equal to 10 MHz), the DAC data-rate is around 100 MHz as illustrated in Figure 2 [2][3][4].…”

Section: Introductionmentioning

confidence: 99%

A 12-Bit 1-Gsample/s Nyquist Current-Steering DAC in 0.35 µm CMOS for Wireless Transmitter

Aliparast

Bahar²,

Koozehkanani³

et al. 2011

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The present work deals with 12-bit Nyquist current-steering CMOS digital-to-analog converter (DAC) which is an essential part in baseband section of wireless transmitter circuits. Using oversampling ratio (OSR) for the proposed DAC leads to avoid use of an active analog reconstruction filter. The optimum segmentation (75%) has been used to get the best DNL and reduce glitch energy. This segmentation ratio guarantees the monotonicity. Higher performance is achieved using a new 3-D thermometer decoding method which reduces the area, power consumption and the number of control signals of the digital section. Using two digital channels in parallel, helps reach 1-GSample/s frequency. Simulation results show that the spuriousfree-dynamic-range (SFDR) in Nyquist rate is better than 64 dB for sampling frequency up to 1-GSample/s. The analog voltage supply is 3.3 V while the digital part of the chip operates with only 2.4 V. Total power consumption in Nyquist rate measurement is 144.9 mW. The chip has been processed in a standard 0.35 µm CMOS technology. Active area of chip is 1.37 mm 2 .

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An 802.11g WLAN SoC

Cited by 52 publications

References 6 publications

System study on nonlinear suppression of varying-envelope local interference in multimode transceivers

System study on nonlinear suppression of varying-envelope local interference in multimode transceivers

I/Q mismatch calibration based on digital baseband

A 12-Bit 1-Gsample/s Nyquist Current-Steering DAC in 0.35 µm CMOS for Wireless Transmitter

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An 802.11g WLAN SoC

Cited by 52 publications

References 6 publications

System study on nonlinear suppression of varying-envelope local interference in multimode transceivers

System study on nonlinear suppression of varying-envelope local interference in multimode transceivers

I/Q mismatch calibration based on digital baseband

A 12-Bit 1-Gsample/s Nyquist Current-Steering DAC in 0.35 &#181;m CMOS for Wireless Transmitter

Contact Info

Product

Resources

About

A 12-Bit 1-Gsample/s Nyquist Current-Steering DAC in 0.35 µm CMOS for Wireless Transmitter