An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC

Nakamura, K.; Hotta, Masao; Carley, L.R.; Allsot, D.J.

doi:10.1109/4.364430

Cited by 85 publications

(10 citation statements)

References 24 publications

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“…In words, energy scales by the required f T , which itself must be a large multiple of the of the conversion rate (e.g., k is on the order of 25-50 for a pipeline ADC [22]). Thus, energy scales with f s and power scales with f s 2 .…”

Section: Energy In High-speed Convertersmentioning

confidence: 99%

Energy limits in A/D converters

Murmann

2013

2013 IEEE Faible Tension Faible Consommation

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Driven by ever-increasing application demands, the energy expended per A/D conversion has improved substantially over the last decade. This paper surveys the most recent trends and investigates practical energy limits of A/D converter architectures that are commonly employed in fine-line CMOS technology. We observe that today's most efficient converters operate at about two orders of magnitude above the classical 8kT·SNR thermal limit. Furthermore, it is shown that a large fraction of today's designs have approached ideal thermal limit lines, corresponding to a four-fold increase in energy per bit of resolution.

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Section: Energy In High-speed Convertersmentioning

confidence: 99%

Energy limits in A/D converters

Murmann

2013

2013 IEEE Faible Tension Faible Consommation

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“…The amplifier also employs compensation to the cascode node of the first stage rather than conventional Miller compensation, which results in wider bandwidth [19]- [22]. Detailed design procedures and power-optimization techniques for this type of amplifier are given in [23] and [24].…”

Section: Switched-capacitor Integrator Designmentioning

confidence: 99%

A 13-bit, 1.4-MS/s sigma-delta modulator for RF baseband channel applications

Feldman¹,

Boser

Gray

1998

IEEE J. Solid-State Circuits

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A 13-bit, 1.4-MS/s, sixth-order cascaded sigma-delta modulator oversampling at 16 X is implemented in a 0.72 m complementary metal-oxide-semiconductor process for use in the baseband path of a radio-frequency receiver. The modulator achieves 77 dB of dynamic range and dissipates 81 mW from a 3.3 V supply. It is characterized for the blocking and intermodulation requirements of a cordless telephone application.

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“…However, high-resolution pipelined ADCs are proved to be power-hungry and usually require complex calibration techniques. Many researches have been conducted to reduce successfully the power consumption from a few watts [4] to less than 100 mW [3,[5][6][7][8]. This progress makes it possible to integrate the ADC with other DSPs on a single chip.…”

Section: Introductionmentioning

confidence: 98%

A 1.8 V CMOS fourth-order Gm-C bandpass sigma-delta modulator dedicated to front-end ultrasonic receivers

Qin

El‐Sankary

2006

Analog Integr Circ Sig Process

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A 4th order bandpass sigma-delta modulator for ultrasound applications is presented. By cascading two second-order identical Gm-C bandpass filters, a 4th-order modulator was designed with high power-efficiency, stability, tunability and programmability. The modulator is dedicated for application with intermediate frequency of 3 MHz and bandwidth of 200 kHz. Implemented in a standard 0.18 µm CMOS technology, the post-layout simulation of the modulator gives a dynamic range of 78 dB. Chip measurements are reported after successfully tuning the modulator to operate at four-time of its folded specifications. The final SNR achieves 58 dB at 0.75 MHz with 50 kHz bandwidth. The modulator consumes 2.5 mW from 1.8 V power supply. Moreover, a programming method is introduced and corresponding circuit is designed to change the central frequency of the modulator between 3 and 20 MHz for scanning different regions of the body. However the 200 kHz bandwidth limits the modulator only for Dobbler mode applications, the effective facilities of programmability are valuable property to expand this application to other wide band applications in future.

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An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC

Cited by 85 publications

References 24 publications

Energy limits in A/D converters

Energy limits in A/D converters

A 13-bit, 1.4-MS/s sigma-delta modulator for RF baseband channel applications

A 1.8 V CMOS fourth-order Gm-C bandpass sigma-delta modulator dedicated to front-end ultrasonic receivers

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