An Accurate Analytical Model for Tunnel FET Output Characteristics

Abstract

The analytical models for the output characteristics of tunnel FETs (TFETs) based on Maxwell-Boltzmann (MB) statistics have some accuracy issues, especially in linear region of operation, when compared with more sophisticated numerical approaches. In this letter, by exploiting the thermal injection method (TIM), an accurate analytical model for the TFET potential profile is proposed. Although the approach is initially envisaged for heterojunction TFETs (H-TFETs), it could be straightforwardly adopted for homojunction TFETs. After an accurate description of the potential profile is obtained, the current is then computed by means of a Landauer-like expression. Comparison with numerical simulations at different bias conditions shows that the predicted output characteristics qualitatively improve, leading to a significant enhancement in accuracy at a much less computational cost.

Threshold voltage model for hetero-gate-dielectric tunneling field effect transistors

“…Analytical models are helpful to design, simulate and provide a further insight on the working electrical characteristics of the device. Therefore, to understand the overall performance of a device compact analytical threshold voltage model of HGD TFET structure is needed but no analytical model is available in the literature for HGD TFET in best of our knowledge except few analytical models available for TFET [22][23][24][25]. In this paper, compact analytical models for the channel potential, tunneling width and the threshold voltage of the HDG TFET have been derived using parabolic potential approximation method to solve the 2-D Poisson's equation.…”

A Compact Current–Voltage Model for 2-D-Semiconductor-Based Lateral Homo-/Hetero-Junction Tunnel-FETs

“…However, to study the behavior of these devices in circuits, we need to develop their compact models for accurate and fast simulations and carry out various design optimizations. There have been studies on the modeling of both HMJ and HTJ TFETs fabricated on bulk semiconductors [23]- [33], but only a few based on 2-D materials [34]- [36]. Moreover, most of these models [24], [28], [29], [32], [34], [35] are numerical, or do not model the source and drain Fermi degeneracy [23]- [27], [31]- [33], [36], or the drain bias dependence [24], [29], [32], [36] and cannot physically model zero drain current at zero drainsource bias [18], [23]- [27], [29], [31], [32].…”

“…There have been studies on the modeling of both HMJ and HTJ TFETs fabricated on bulk semiconductors [23]- [33], but only a few based on 2-D materials [34]- [36]. Moreover, most of these models [24], [28], [29], [32], [34], [35] are numerical, or do not model the source and drain Fermi degeneracy [23]- [27], [31]- [33], [36], or the drain bias dependence [24], [29], [32], [36] and cannot physically model zero drain current at zero drainsource bias [18], [23]- [27], [29], [31], [32]. Essentially, the incorporation of Kane's band-to-band tunneling model in [18], [24]- [27], [29], [31], [32], which predicts a nonzero tunneling carrier generation rate even at zero drain-source bias (due to presence of a nonzero electric field at source-channel junction), and an implicit assumption of fully occupied valence and fully empty conduction band [37] is what makes physically modeling zero drain current at zero drain bias unfeasible.…”