The fast growth of information technology has been sustained by continuous scaling down of the silicon-based metal-oxide field-effect transistor. However, such technology faces two major challenges to further scaling. First, the device electrostatics (the ability of the transistor's gate electrode to control its channel potential) are degraded when the channel length is decreased, using conventional bulk materials such as silicon as the channel. Recently, two-dimensional semiconducting materials have emerged as promising candidates to replace silicon, as they can maintain excellent device electrostatics even at much reduced channel lengths. The second, more severe, challenge is that the supply voltage can no longer be scaled down by the same factor as the transistor dimensions because of the fundamental thermionic limitation of the steepness of turn-on characteristics, or subthreshold swing. To enable scaling to continue without a power penalty, a different transistor mechanism is required to obtain subthermionic subthreshold swing, such as band-to-band tunnelling. Here we demonstrate band-to-band tunnel field-effect transistors (tunnel-FETs), based on a two-dimensional semiconductor, that exhibit steep turn-on; subthreshold swing is a minimum of 3.9 millivolts per decade and an average of 31.1 millivolts per decade for four decades of drain current at room temperature. By using highly doped germanium as the source and atomically thin molybdenum disulfide as the channel, a vertical heterostructure is built with excellent electrostatics, a strain-free heterointerface, a low tunnelling barrier, and a large tunnelling area. Our atomically thin and layered semiconducting-channel tunnel-FET (ATLAS-TFET) is the only planar architecture tunnel-FET to achieve subthermionic subthreshold swing over four decades of drain current, as recommended in ref. 17, and is also the only tunnel-FET (in any architecture) to achieve this at a low power-supply voltage of 0.1 volts. Our device is at present the thinnest-channel subthermionic transistor, and has the potential to open up new avenues for ultra-dense and low-power integrated circuits, as well as for ultra-sensitive biosensors and gas sensors.

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Metal contacts to atomically thin two-dimensional (2D) crystal based FETs play a decisive role in determining their operation and performance. However, the effects of contacts on the switching behavior, field-effect mobility, and current saturation of monolayer MoS2 FETs have not been well explored and, hence, is the focus of this work. The dependence of contact resistance on the drain current is revealed by four-terminal-measurements. Without high-κ dielectric boosting, an electron mobility of 44 cm(2)/(V·s) has been achieved in a monolayer MoS2 FET on SiO2 substrate at room temperature. Velocity saturation is identified as the main mechanism responsible for the current saturation in back-gated monolayer MoS2 FETs at relatively higher carrier densities. Furthermore, for the first time, electron saturation velocity of monolayer MoS2 is extracted at high-field condition.

Copper-based interconnects employed in a wide range of integrated circuit (IC) products are fast approaching a dead-end due to their increasing resistivity and diminishing current carrying capacity with scaling, which severely degrades both performance and reliability. Here we demonstrate chemical vapor deposition-synthesized and intercalation-doped multilayer-graphene-nanoribbons (ML-GNRs) with better performance (more than 20% improvement in estimated delay per unit length), 25%/72% energy efficiency improvement at local/global level, and superior reliability w.r.t. Cu for the first time, for dimensions (down to 20 nm width and thickness of 12 nm) suitable for IC interconnects. This is achieved through a combination of GNR interconnect design optimization, high-quality ML-GNR synthesis with precisely controlled number of layers, and effective FeCl intercalation doping. We also demonstrate that our intercalation doping is stable at room temperature and that the doped ML-GNRs exhibit a unique width-dependent doping effect due to increasingly efficient FeCl diffusion in scaled ML-GNRs, thereby indicating that our doped ML-GNRs will outperform Cu even for sub-20 nm widths. Finally, reliability assessment conducted under accelerated stress conditions (temperature and current density) established that highly scaled intercalated ML-GNRs can carry over 2 × 10 A/cm of current densities, whereas Cu interconnects suffer from immediate breakdown under the same stress conditions and thereby addresses the key criterion of current carrying capacity necessary for an alternative interconnect material. Our comprehensive demonstration of highly reliable intercalation-doped ML-GNRs paves the way for graphene as the next-generation interconnect material for a variety of semiconductor technologies and applications.

The negative-capacitance field-effect transistor(NC-FET) has attracted tremendous research efforts. However, the lack of a clear physical picture and design rule for this device has led to numerous invalid fabrications. In this work, we address this issue based on an unexpectedly concise and insightful analytical formulation of the minimum hysteresis-free subthreshold swing (SS), together with several important conclusions. Firstly, well-designed MOSFETs that have low trap density, low doping in the channel, and excellent electrostatic integrity, receive very limited benefit from NC in terms of achieving subthermionic SS. Secondly, quantumcapacitance is the limiting factor for NC-FETs to achieve hysteresis-free subthermionic SS, and FETs that can operate in the quantum-capacitance limit are desired platforms for NC-FET construction. Finally, a practical role of NC in FETs is to save the subthreshold and overdrive voltage losses. Our analysis and findings are intended to steer the NC-FET research in the right direction.