An Advanced CuCu Hybrid Bonding For Novel Stacked CMOS Image Sensor

Kagawa, Y.; Fujii, Nobutoshi; Aoyagi, K.; Kobayashi, Yuka; Nishi, Seiji; Todaka, N.; Takeshita, Satoshi; Taura, Jyunya; Takahashi, Hideki; Nishimura, Yasumasa; Tatani, Keiji; Kawamura, M.; Nakayama, Hiroki; Ohno, Keiichi; Iwamoto, Hayato; Kadomura, S.; Hirayama, Teruo

doi:10.1109/edtm.2018.8421453

Cited by 34 publications

(9 citation statements)

References 4 publications

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“…The pixel array contains a 14,464 (H) × 11,264 (V) array of 1.1 µm-pitch pixels. The control signals for the pixels are sent from the ASIC substrate to the pixel substrate through high-density wafer-to-wafer hybrid bonding (HB) connectors located on the left and right sides of the pixel array 21 , 22 . The pixel output signals are connected to the ASIC substrate through HBs located within the pixel array.…”

Section: Resultsmentioning

confidence: 99%

Ultra-high-resolution quanta image sensor with reliable photon-number-resolving and high dynamic range capabilities

Ma¹,

Zhang²,

Robledo³

et al. 2022

Sci Rep

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Superior low-light and high dynamic range (HDR) imaging performance with ultra-high pixel resolution are widely sought after in the imaging world. The quanta image sensor (QIS) concept was proposed in 2005 as the next paradigm in solid-state image sensors after charge coupled devices (CCD) and complementary metal oxide semiconductor (CMOS) active pixel sensors. This next-generation image sensor would contain hundreds of millions to billions of small pixels with photon-number-resolving and HDR capabilities, providing superior imaging performance over CCD and conventional CMOS sensors. In this article, we present a 163 megapixel QIS that enables both reliable photon-number-resolving and high dynamic range imaging in a single device. This is the highest pixel resolution ever reported among low-noise image sensors with photon-number-resolving capability. This QIS was fabricated with a standard, state-of-the-art CMOS process with 2-layer wafer stacking and backside illumination. Reliable photon-number-resolving is demonstrated with an average read noise of 0.35 e- rms at room temperature operation, enabling industry leading low-light imaging performance. Additionally, a dynamic range of 95 dB is realized due to the extremely low noise floor and an extended full-well capacity of 20k e-. The design, operating principles, experimental results, and imaging performance of this QIS device are discussed.

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Section: Resultsmentioning

confidence: 99%

Ultra-high-resolution quanta image sensor with reliable photon-number-resolving and high dynamic range capabilities

Ma¹,

Zhang²,

Robledo³

et al. 2022

Sci Rep

View full text Add to dashboard Cite

show abstract

“…7 shows the relationship between extra DR by MEHDR DR MEHDR , SNR MEHDR , and the ratio of integration time, t 0 /t 1 . For example, DR is extended by 30 dB from (5), but SNR at the signal transition point is degraded by 15 dB from (6) when the ratio of integration time t 0 /t 1 is set at 32. Therefore, more than two different integration times may be needed to avoid a significant SNR drop at the signal transition point [40], [44]- [46], assuming 120-dB DR, and 70-dB DR in each subframe.…”

Section: B Linear Response Hdr With Multiple Exposurementioning

confidence: 99%

HDR CMOS Image Sensors for Automotive Applications

Takayanagi¹,

Kuroda

2022

IEEE Trans. Electron Devices

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Because of various purposes and high dynamic range (HDR) of brightness of objects in automotive applications, HDR image capture is a primary requirement. In this article, HDR CMOS image sensor (CIS) technology and its automotive applications are discussed including application requirements, basic HDR approaches and trends of HDR CMOS image sensor technologies, advantages and disadvantages for automotive application, and future prospect of the HDR technology. LED flicker caused by time aliasing effect and motion artifacts are two major issues in conventional multiple exposure HDR (MEHDR) approach, and several HDR technologies have been introduced for automotive applications. The advancements of image sensor fabrication technology, for instance, backside illumination (BSI) process and pixel level hybrid wafer bonding, have created new trends in the HDR technology.

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“…This configuration does however not decrease the length of the signal bus between the first and the second tier. An alternative and more preferred option is Cu-Cu hybrid bonding as in [11] (see Fig. 4(b)), which is scalable, can achieve lower pitches and uses interconnects that are directly under the first tier.…”

Section: B Planar and 3d-stacked Technologiesmentioning

confidence: 99%

Analysis and Comparison of Readout Architectures and Analog-to-Digital Converters for 3D-Stacked CMOS Image Sensors

Callens

Gielen

2021

IEEE Trans. Circuits Syst. I

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This review paper presents an overview of readout architectures and analog-to-digital converters (ADCs) for 3D-stacked CMOS image sensors (CIS) with their advantages and challenges. Depending on the application requirements, a suitable 3D-stacked readout architecture will be proposed. While most ADCs to date have been reported in planar CIS, this paper ports these designs to a 3D-stacked CIS and compares the different ADC topologies for this 3D-stacked context in terms of noise, speed and power efficiency. The comparison shows that the ramp and incremental (I ) ADCs can achieve a better overall performance compared to the SAR and cyclic ADCs by a factor of ∼3 better for 3D-stacked CIS. In addition, ramp and I ADCs can both achieve (very) low fixed-pattern noise values.

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An Advanced CuCu Hybrid Bonding For Novel Stacked CMOS Image Sensor

Cited by 34 publications

References 4 publications

Ultra-high-resolution quanta image sensor with reliable photon-number-resolving and high dynamic range capabilities

Ultra-high-resolution quanta image sensor with reliable photon-number-resolving and high dynamic range capabilities

HDR CMOS Image Sensors for Automotive Applications

Analysis and Comparison of Readout Architectures and Analog-to-Digital Converters for 3D-Stacked CMOS Image Sensors

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