An All-Optical PCI-Express Network Interface for Optical Packet Switched Networks

Liboiron-Ladouceur, Odile; Wang, Howard; Bergman, Keren

doi:10.1109/ofc.2007.4348447

Cited by 4 publications

(2 citation statements)

References 5 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Due to its high bandwidth and modularity, PCIe is the commercial de facto standard for connecting high-throughput peripherals such as GPUs or solid state disks. Moreover, optical PCIe networks have been demonstrated a decade ago [7], opening the possibility of using PCIe as a communication link over long distances.…”

Section: Introductionmentioning

confidence: 99%

A high-throughput readout architecture based on PCI-Express Gen3 and DirectGMA technology

Rota¹,

Vogelgesang²,

Perez³

et al. 2016

J. Inst.

View full text Add to dashboard Cite

Modern physics experiments produce multi-GB/s data rates. Fast data links and high performance computing stages are required for continuous data acquisition and processing. Because of their intrinsic parallelism and computational power, GPUs emerged as an ideal solution to process this data in high performance computing applications. In this paper we present a high-throughput platform based on direct FPGA-GPU communication. The architecture consists of a Direct Memory Access (DMA) engine compatible with the Xilinx PCI-Express core, a Linux driver for register access, and high-level software to manage direct memory transfers using AMD's DirectGMA technology. Measurements with a Gen3 x8 link show a throughput of 6.4 GB/s for transfers to GPU memory and 6.6 GB/s to system memory. We also assess the possibility of using the architecture in low latency systems: preliminary measurements show a round-trip latency as low as 1 µs for data transfers to system memory, while the additional latency introduced by OpenCL scheduling is the current limitation for GPU based systems. Our implementation is suitable for real-time DAQ system applications ranging from photon science and medical imaging to High Energy Physics (HEP) systems. K: Trigger concepts and systems (hardware and software); Data acquisition concepts; Digital electronic circuits 1Corresponding author.

show abstract

Section: Introductionmentioning

confidence: 99%

A high-throughput readout architecture based on PCI-Express Gen3 and DirectGMA technology

Rota¹,

Vogelgesang²,

Perez³

et al. 2016

J. Inst.

View full text Add to dashboard Cite

show abstract

“…In this work, we propose a scalable and transparent network interface designed to address the issue of power dissipation by uniquely exploiting the parallelism and capacity of wavelength-division multiplexing (WDM) [9,10]. The proposed photonic network interface extends the capabilities of serial electronic protocols in high-performance computing systems by offering full bandwidth deployment in intra-and inter-chip optical interconnects by directly mapping serial streams onto multiple WDM channels in a highly power efficient manner.…”

Section: Introductionmentioning

confidence: 99%

Low-power, transparent optical network interface for high bandwidth off-chip interconnects

Liboiron-Ladouceur¹,

Wang²,

Garg³

et al. 2009

Opt. Express

Self Cite

View full text Add to dashboard Cite

The recent emergence of multicore architectures and chip multiprocessors (CMPs) has accelerated the bandwidth requirements in high-performance processors for both on-chip and off-chip interconnects. For next generation computing clusters, the delivery of scalable power efficient off-chip communications to each compute node has emerged as a key bottleneck to realizing the full computational performance of these systems. The power dissipation is dominated by the off-chip interface and the necessity to drive high-speed signals over long distances. We present a scalable photonic network interface approach that fully exploits the bandwidth capacity offered by optical interconnects while offering significant power savings over traditional E/O and O/E approaches. The power-efficient interface optically aggregates electronic serial data streams into a multiple WDM channel packet structure at time-of-flight latencies. We demonstrate a scalable optical network interface with 70% improvement in power efficiency for a complete end-to-end PCI Express data transfer.

show abstract

P-sync: A Photonically Enabled Architecture for Efficient Non-local Data Access

Whelihan

Hughes

Sawyer

et al. 2013

2013 IEEE 27th International Symposium on Parallel and Distributed Processing

View full text Add to dashboard Cite

An All-Optical PCI-Express Network Interface for Optical Packet Switched Networks

Abstract: We report on the implementation of a power-efficient, low-latency edge node PCI-Express interface to a WDM optical packet switched network. Scalability is examined under the limits set by PCI-Express jitter specification on the packet propagation.

Cited by 4 publications

References 5 publications

A high-throughput readout architecture based on PCI-Express Gen3 and DirectGMA technology

A high-throughput readout architecture based on PCI-Express Gen3 and DirectGMA technology

Low-power, transparent optical network interface for high bandwidth off-chip interconnects

P-sync: A Photonically Enabled Architecture for Efficient Non-local Data Access

Contact Info

Product

Resources

About