An Approximate Bufferless Network-on-Chip

Wang, Xiaohang; Wang, Yadong

doi:10.1109/access.2019.2943922

Cited by 11 publications

(7 citation statements)

References 36 publications

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“…This algorithm allows U-turn using several VCs. Wang et al [11] proposed an algorithm which relaxes transmission accuracy for the applications that allow lossy communication. This algorithm discards conflicting approximate flits without retransmission and recovers them after packet transmission.…”

Section: Related Workmentioning

confidence: 99%

A Novel Approach for the Design of Fault-Tolerant Routing Algorithms in NoCs: Passage of Faulty Nodes, Not Always Detour

Fukushi¹,

Kurokawa²

2022

Network-on-Chip - Architecture, Optimization, and Design Explorations

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Due to the faults in system fabrication and run time, designing an efficient fault-tolerant routing algorithm with the property of deadlock-freeness is crucial for realizing dependable Network-on-Chip (NoC) systems with high communication performance. In this chapter, we introduce a novel approach for the design of fault-tolerant routing algorithms in NoCs. The common idea of the fault-tolerant routing has been undoubtedly to detour faulty nodes, while our approach allows passing through faulty nodes with the slight modification of NoC architecture. As a design example, we present an XY-based routing algorithm with the passage function. To investigate the effect of the approach, we compare the communication performance (i.e. average latency) of the XY-based algorithm with well-known region-based algorithms under the condition of with and without virtual channels. Finally, we provide possible directions of future research on the fault-tolerant routing with the passage function.

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Section: Related Workmentioning

confidence: 99%

A Novel Approach for the Design of Fault-Tolerant Routing Algorithms in NoCs: Passage of Faulty Nodes, Not Always Detour

Fukushi¹,

Kurokawa²

2022

Network-on-Chip - Architecture, Optimization, and Design Explorations

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“…, M }, i = j, in a relay channel. The total attenuation of electromagnetic signal transmitted from C i to C j consists of DPL and MAA as follows: 1 1) Dielectric Propagation Loss (DPL)…”

Section: Channel Model For Point-to-point Communications In a Winocmentioning

confidence: 99%

“…With growing and emerging multimedia applications which require a considerable enhancement of computation and interactive functionality, wire-based interconnects between cores in a Network-on-Chip (NoC) have been shown to be insufficient to meet the critical requirements of high performance, scalability and low latency, especially in this technological era of ever increasing number of cores [1], [2]. In order to address these issues, various alternative fabrics and architectures for NoCs have been investigated, such as photonic NoC [3], [4], nanophotonic NoC [5], three-dimensional NoC (3D NoC) [6]- [8] and Wireless NoC (WiNoC) [9]- [13].…”

Section: Introductionmentioning

confidence: 99%

On the Cooperative Relaying Strategies for Multi-Core Wireless Network-on-Chip

et al. 2021

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Recently, hybrid wired-wireless Network-on-Chip (WiNoC) has been proposed as a suitable communication fabric to provide scalability and satisfy high performance demands of the exascale era of modern multi/many-core System-on-Chip (SoC) design. A well accepted low-latency wireless communication fabric for WiNoCs is millimeter wave (mm-Wave). However, the wireless channel of mm-Wave is lossy due to free space signal radiation with both dielectric propagation loss (DPL) and molecular absorption attenuation (MAA). This is exacerbated for edge situated cores and in macro-chips embodying thousands of cores. To this end, this paper proposes efficient relaying techniques to improve the signal strength of the wireless channel in the WiNoCs using on-chip networking approaches under the realistic SoC channel conditions. First, we propose a realistic relay communication channel for the WiNoCs to characterise both MAA and DPL which have drastic effect on the performance. We then derive and show that the channel capacity for a single-relay WiNoC employing Amplify-and-Forward (AF) and Decode-and-Forward (DF) relaying protocols increases by up to 20% and 25%, respectively, compared to the conventional direct transmission. The AF protocol outperforms the DF mode for shorter transmissions between the relay and the destination cores, while the reverse is observed in other conditions. A hybrid protocol is then proposed to exploit the performance advantages of both relaying protocols to address the unbalanced distance between the cores, providing the maximal channel capacity close to the cutset bound. Finally, our approach is further validated in multi-relay WiNoCs where the communications of the remote cores is assisted by multiple intermediate cores along with the details of associated realistic channel model in emerging many-core SoCs. INDEX TERMS channel modeling, cooperative diversity, relay networks, Wireless network-on-chip, WiNoC.

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“…Using these techniques, approximate Network on Chip (NoC) [5] can achieve higher performance [6,7,8] or lower power consumption [9,10,11] through actively giving up reliability degradation in chip multiprocessors (CMP). ABNoC, an approximate bufferless NoC achieves an average 83.6% retransmission reduction via decreasing transmission accuracy [6]. Dapper increases NoC throughput by up to 21% and reduces latency by up to 45.5% by using single cycle overlay circuits [7].…”

Section: Introductionmentioning

confidence: 99%

“…ABNoC, an approximate bufferless NoC achieves an average 83.6% retransmission reduction via decreasing transmission accuracy [6]. Dapper increases NoC throughput by up to 21% and reduces latency by up to 45.5% by using single cycle overlay circuits [7]. APPROX-NoC, a hardware data approximation framework facilitates approximate matching of data patterns and reduces data movement across the chip, up to 9% latency reduction and 60% throughput improvement [8].…”

Section: Introductionmentioning

confidence: 99%

Mitigating multi-cell upsets impacts on approximate network on chip through unequal message protection

Jiao

Han

2020

IEICE Electron. Express

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Approximate Network on Chip (NoC) is being considered as a good solution to reduce power consumption and improve the communication efficiency. However, increasing Multi-Cell Upsets (MCU) is seriously threatening the approximate NoC reliability and causes output far away from guaranteed quality of results. In this paper, we propose an unequal message protection framework with same coding length for mitigating MCU impacts on approximate NoC. The proposed framework makes good use of side information to select the special messages from normal messages and embeds same length coding scheme for all messages while providing stronger protection capability for special messages in approximate NoCs. The effectiveness of proposed methodology is evaluated by complete fault injection, which captures the dual-voltage approximate technique, unequal message protection mechanism and MCU error propagation in a joint manner. The cycle-accurate simulation using synthetic (e.g., Transpose, Uniform) and realistic benchmarks(e.g.,VOPD and MWD) show that, compared with the state-of-the-art approximate NoC architecture, the proposed unequal message protection framework can achieve up to average 84.9% reliability improvement with 6.25% power consumption 6.9% area overhead, and 15.38% latency increase.

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An Approximate Bufferless Network-on-Chip

Cited by 11 publications

References 36 publications

A Novel Approach for the Design of Fault-Tolerant Routing Algorithms in NoCs: Passage of Faulty Nodes, Not Always Detour

A Novel Approach for the Design of Fault-Tolerant Routing Algorithms in NoCs: Passage of Faulty Nodes, Not Always Detour

On the Cooperative Relaying Strategies for Multi-Core Wireless Network-on-Chip

Mitigating multi-cell upsets impacts on approximate network on chip through unequal message protection

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