An area-efficient digitally-assisted DC canceling loop for high sensitivity UHF RFID receiver

Liu, Jing; Guo, Qiang; Wang, Yu; Tan, Xi; Min, Hao

doi:10.1109/rfid-ta.2016.7750759

Cited by 2 publications

(2 citation statements)

References 9 publications

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“…However, due to the limited isolation of the radio frequency switch, the receiver suffers from the interference from the signal received by the antenna during the calibration process [1,20]. In addition, some DC offset cancellation methods in the digital domain employ digital filters to filter out the DC component of the signal [21], which not only requires complex digital algorithms but also filters out useful signals in low-frequency components [22].…”

Section: Introductionmentioning

confidence: 99%

High-Linearity Direct Conversion Receiver with the Transconductance Equalization Technique and DCOC Method

et al. 2021

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To improve the linearity of direct conversion receivers (DCRs), two high-linearity methods for high second-order intercept points (IP2s) and high third-order intercept points (IP3s) are proposed. To improve IP3s, a transconductance equalization technique for a complementary input operational amplifier (OPAMP) is proposed in an active-RC low-pass filter (LPF), while a digital-analog hybrid DC offset calibration (DCOC) method is proposed to improve IP2s. For one thing, the proposed transconductance equalization technique employs a pair of resistors to guarantee high voltage gain for an OPAMP with two-stage Miller topology under a high-input voltage swing to improve linearity with little deterioration of the noise performance. For another, during the DCOC method, the low-noise amplifier is turned off and replaced by an equivalent resistance of the output impedance of the low-noise amplifier to ensure the accuracy and effectiveness of the DCOC method. Fabricated in 40-nm CMOS technology, the receiver with proposed methods can realize a noise figure of 2.6–3.5 dB in the full frequency band, with an OIP3 of 28 dBm, an IM2 more than 70 dBc, and a remaining DC of −53.2 dBm under the total voltage gain of 60 dB.

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Section: Introductionmentioning

confidence: 99%

High-Linearity Direct Conversion Receiver with the Transconductance Equalization Technique and DCOC Method

et al. 2021

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“…Besides, some methods operate in real time and eliminate DC offset through digital filter. These methods suffer from signal distortion and large consumption of digital resources [16,17].…”

Section: Introductionmentioning

confidence: 99%

An effective DC offset calibration method combined with analog and digital circuits for direct conversion receivers

Wang¹,

Fan

Shen³

et al. 2019

IEICE Electron. Express

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This paper presents a DC offset calibration (DCOC) method combined with analog and digital circuits for direct conversion receivers. To work effectively, the LNA is shut off for better isolation and replaced by an equivalent resistance to keep the same transfer function of DC offset between calibration and operation. This method adopts DACs to compensate DC offset, then averages and eliminates the residual DC offset in the digital domain. Measurements show that this DCOC method achieves 0.44 mV DC offset and improves IM2 by 10 dB. The DCOC circuits occupy 0.23 mm 2 in 40 nm CMOS and consume 124 µA at 1.3 V supply.

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An area-efficient digitally-assisted DC canceling loop for high sensitivity UHF RFID receiver

Cited by 2 publications

References 9 publications

High-Linearity Direct Conversion Receiver with the Transconductance Equalization Technique and DCOC Method

High-Linearity Direct Conversion Receiver with the Transconductance Equalization Technique and DCOC Method

An effective DC offset calibration method combined with analog and digital circuits for direct conversion receivers

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