An Area-Efficient Multi-Rate Digital Decimator

Li, Qi; Shu, Yujun; Chen, Yongzhen; Wu, Jiangfeng

doi:10.1109/asicon47005.2019.8983528

2019 IEEE 13th International Conference on ASIC (ASICON) 2019

DOI: 10.1109/asicon47005.2019.8983528

|View full text |Cite

An Area-Efficient Multi-Rate Digital Decimator

Qi Li

Yujun Shu

Yongzhen Chen

et al.

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Citation Types

Supporting

Mentioning

Contrasting

Year Published

2022

Publication Types

Select...

Article1

Relationship

Self Cite0

Independent1

Authors

Journals

Cited by 1 publication

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

Heuristic Analysis of Multiplierless Desensitized Half-Band Decimation Filter for Wireless Applications

Abinaya¹,

Maheswari²

2022

J CIRCUIT SYST COMP

View full text Add to dashboard Cite

This paper elucidates the half-band FIR filter, which plays an important role when applying decimation by a factor of two. When the down-conversion is applied in sampling rate, this digital filter is frequently employed in conjunction with down-samplers. Despite the fact that numerous approaches have been proposed for designing half-band FIR filters, this paper proposes an utterly unique method for designing and implementing multiplierless half-band FIR filters, which minimizes the coefficient sensitivity and also reduces hardware complexity of the conventional half-band FIR filter. The proposed desensitized and further desensitized multiplierless half-band FIR filters are analyzed with four high-speed parallel prefix adders in Xilinx Vivado development tool and built on Kintex 7 FPGA for exploring power consumption, number of LUTs and delay. The proposed half-band structure is compared with the classical half-band architecture with respect to power consumption, path delay and number of LUTs. Based on the attained results on Kintex 7 FPGA, the proposed low-sensitivity filter structure outperforms with a 41.09% reduction in the number of LUTs, a 11.91% reduction in delay and a 38.35% reduction in power consumption in contrast to the existing desensitized half-band filter. Subsequently, the proposed further desensitized filter provides a 4.87% reduction in stopband ripple than the desensitized structure and an 8.84% reduction than the existing half-band decimation filter.

show abstract

Heuristic Analysis of Multiplierless Desensitized Half-Band Decimation Filter for Wireless Applications

Abinaya¹,

Maheswari²

2022

J CIRCUIT SYST COMP

View full text Add to dashboard Cite

show abstract

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

customersupport@researchsolutions.com

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Made with 💙 for researchers

Part of the Research Solutions Family.

An Area-Efficient Multi-Rate Digital Decimator

Cited by 1 publication

References 3 publications

Heuristic Analysis of Multiplierless Desensitized Half-Band Decimation Filter for Wireless Applications

Heuristic Analysis of Multiplierless Desensitized Half-Band Decimation Filter for Wireless Applications

Contact Info

Product

Resources

About