2020
DOI: 10.1039/c9mh01923e
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An asymmetric hot carrier tunneling van der Waals heterostructure for multibit optoelectronic memory

Abstract: Novel optoelectronic memory is fabricated using a van der Waals heterostructure of PtS2/h-BN/graphene with asymmetric hot carrier tunneling barriers.

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Cited by 45 publications
(47 citation statements)
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“…As such, in this configuration a memory window is defined by the difference between programming‐state V TH and erase‐state V TH. [ 42,43 ] A maximum memory window of ≈38.94 V is calculated for power densities of 3 and 10 mW cm −2 during WRITE and ERASE operations, respectively. The cyclic repeatability of the optical WRITE and ERASE operations is assessed to ascertain the endurance of BP devices, as shown in Figure 1j,k.…”
Section: Figurementioning
confidence: 99%
“…As such, in this configuration a memory window is defined by the difference between programming‐state V TH and erase‐state V TH. [ 42,43 ] A maximum memory window of ≈38.94 V is calculated for power densities of 3 and 10 mW cm −2 during WRITE and ERASE operations, respectively. The cyclic repeatability of the optical WRITE and ERASE operations is assessed to ascertain the endurance of BP devices, as shown in Figure 1j,k.…”
Section: Figurementioning
confidence: 99%
“…Trapping phenomena are commonly due to processes including Fowler-Nordheim(FN) tunneling [38,39] or hot carrier injection. [40,41] Hence, to achieve high switching performance, including large memory windows and short transitions, high operating voltages are required to enhance these mechanisms. However, defect generation or large detrapping time constants from oxide layers in these cases limits the lifetime of these optical memories.…”
Section: Resultsmentioning
confidence: 99%
“…The latest development in the electronic and optical memories based on 2DMCHs is summarized in Table 1 . [ 18,32,46–51,127,183–189 ]…”
Section: Emerging Novel Applicationsmentioning
confidence: 99%