An Automated Approximation Methodology for Arithmetic Circuits

De, Sayandip; Huisken, Jos; Corporaal, Henk

doi:10.1109/islped.2019.8824974

Cited by 10 publications

(6 citation statements)

References 13 publications

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“…Nepal et al [24] adopts a 5-stage transformation approach on an input behaviour based abstract synthesis tree (AST) to generate approximate RTL netlists. De, Huisken and Corporaal [25] followed a top down approach of optimizing complex circuits by replacing specific standard cells (contributing ≥ 10% of total power) with their approximated versions. Roy et al [26] generated multiple approximate full adder circuits, modified at the transistor level.…”

Section: Related Workmentioning

confidence: 99%

Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells Using Swarm Intelligence

Saha

Ahmed

Kalluru

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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This paper proposes low power optimization using a modified swarm intelligence algorithm for the scenariostransistor sizing based static power reduction and low power standard cell generation for approximate computing. In these scenarios, we explore a lower abstraction level and see how standard cells can be tuned to a power-delay-quality optimal point. For transistor sizing, the algorithm considers fabrication process parameter variations (for ±3σ design) in addition to a wide range of temperature (-55 o C to 125 o C) and supply voltage (±10%) variations to yield PVT aware robust sizing solutions. The approach has been applied on numerous single and multistage circuits (including ISCAS benchmarks) while proposing a dual sizing solution for non-critical and critical path cells. For approximate systems, we present algorithm-generated full adder designs for speech processing systems. The designs vary in terms of accuracy and power. Results show leakage reductions up to 58.2% for conventional and 66.8% with approximation designs for 22nm metal gate high-K (MGK) technology cells.

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Section: Related Workmentioning

confidence: 99%

Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells Using Swarm Intelligence

Saha

Ahmed

Kalluru

et al. 2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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“…The execution time required by RETSINA is comparable (or even smaller) to existing approximate design automation frameworks. For example, [32] [26] needs 20 hours for an 8-bit multiplier. Note that these frameworks apply only fixed approximation.…”

Section: Figure 12mentioning

confidence: 99%

“…Cartesian genetic programming is employed in [30], [31] to produce Pareto-optimal approximates multiplier and adders. The library's standard cells are approximated in [32] and a heuristic approach is devised to modify the accurate netlist using these cells and generate approximate arithmetic circuits. An extension to high-level synthesis tools [33] applies variable-to-constant approximation and builds approximate circuits that satisfy real-time constraints.…”

Section: Related Workmentioning

confidence: 99%

Design Automation of Approximate Circuits With Runtime Reconfigurable Accuracy

2020

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Leveraging the inherent error tolerance of a vast number of application domains that are rapidly growing, approximate computing arises as a design alternative to improve the efficiency of our computing systems by trading accuracy for energy savings. However, the requirement for computational accuracy is not fixed. Controlling the applied level of approximation dynamically at runtime is a key to effectively optimize energy, while still containing and bounding the induced errors at runtime. In this paper, we propose and implement an automatic and circuit independent design framework that generates approximate circuits with dynamically reconfigurable accuracy at runtime. The generated circuits feature varying accuracy levels, supporting also accurate execution. Extensive experimental evaluation, using industry strength flow and circuits, demonstrates that our generated approximate circuits improve the energy by up to 41% for 2% error bound and by 17.5% on average under a pessimistic scenario that assumes full accuracy requirement in the 33% of the runtime. To demonstrate further the efficiency of our framework, we considered two state-of-the-art technology libraries which are a 7nm conventional FinFET and an emerging technology that boosts performance at a high cost of increased dynamic power. INDEX TERMS Approximate computing, approximate design automation, dynamically reconfigurable accuracy, low power.

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“…At the circuit-level, research efforts focus on manual design techniques for adders and multipliers [14], as well as automated methodologies for designing energy-efficient approximate circuits [15]. Data-centric approximations: Data-centric approximations either approximate the memory device that is being accessed or they approximate the value of the data being accessed.…”

Section: Related Workmentioning

confidence: 99%

Approximation-Aware Design of an Image-Based Control System

Mohamed

Goswami

et al. 2020

IEEE Access

Self Cite

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Image-based control (IBC) systems are common in many modern applications. In such systems, image-based sensing imposes massive compute workload, making them challenging to implement on embedded platforms. Approximate image processing is a way to handle this challenge. In essence, approximation reduces the workload at the cost of additional sensor noise. In this work, we propose an approximation-aware design approach for optimizing the energy, memory and performance of an IBC system, making it suitable for embedded implementation. First, we perform compute-and data-centric approximations and evaluate its impact on the energy efficiency, memory utilization and closed-loop qualityof-control (QoC) of the IBC system. We observe that the workload reductions due to approximations allow mapping these lighter approximated IBC tasks to embedded platforms with lower power consumption while still ensuring proper system functionality. Therefore, we explore the interplay between approximations and platform mappings to improve the energy-efficiency of IBC systems. Further, an IBC system operates under several environmental scenarios e.g., weather conditions. We evaluate the sensitivity of the IBC system to our approximation-aware design approach when operated under different scenarios and perform a failure probability (FP) analysis using Monte-Carlo simulations to analyze the robustness of the approximate system. Finally, we design an optimal approximation-aware controller that models the approximation error as sensor noise and show QoC improvements. We demonstrate the effectiveness of our approach using a concrete case-study of a lane keeping assist system (LKAS) using a heterogeneous NVIDIA AGX Xavier embedded platform in a hardware-in-the-loop (HiL) framework. We show energy and memory reduction of up to 92% and 88% respectively, for 44% QoC improvements with respect to the accurate implementation. We show that our approximation-aware design approach has an FP (per km) ≤ 9.6 × 10 −6 %.

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An Automated Approximation Methodology for Arithmetic Circuits

Cited by 10 publications

References 13 publications

Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells Using Swarm Intelligence

Low Power PVT-Aware Transistor Sizing and Approximate Design Generation for Standard Cells Using Swarm Intelligence

Design Automation of Approximate Circuits With Runtime Reconfigurable Accuracy

Approximation-Aware Design of an Image-Based Control System

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