Bisimulations are in general equivalence relations between transition systems which assure that certain aspects of the behaviour of the systems are the same. For many applications it is not possible to maintain such an equivalence unless non-observable (stuttering) behaviour is ignored. However, existing bisimulation relations which permit the removal of non-observable behaviour are unable to preserve temporal logic formulas referring to the next step operator. In this paper we propose a novel bisimulation relation, called next-preserving branching bisimulation, which accomplishes this, maintaining the validity of formulas with the next step, while still allowing non-observable behaviour to be reduced. Based on van Glabbeek and Weijland's notion of branching bisimulation with explicit divergence, we define the novel relation for which we prove the preservation of full CTL * . As an example for its application we show how this definition gives rise to an advanced slicing procedure for temporal logics, a technique in which a system model is reduced to a slice which can be used as a substitute in verification and debugging. The result is a novel procedure for generating a slice that is next-preserving branching bisimilar to the original model. Hence, we can assure that any temporal logic property is preserved in a slice that is created with respect to that property, and consequently the verification on the slice is sound.