An autonomous driving system utilizing image processing accelerated by FPGA

Takasaki, Kazunari; Negishi, Ryotaro; Yamashita, Kazuki; Fukada, Keisuke; Wakaizumi, Tomoya; Togawa, Nozomu

doi:10.1109/icfpt52863.2021.9609937

Cited by 3 publications

(1 citation statement)

References 1 publication

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“…Additionally, in comparison with the system described in [23], our system achieves relatively higher accuracy without compromising recognition speed. Moreover, when evaluated against the system detailed in [24], our approach significantly reduces resource consumption while effectively fulfilling the intended functionality. [19] 148 K 118 K 900 99.6% Yin et al [2] 154 K 71 K 54.76 90.78% (mAP) Kojima et al [20] 40 K 27 K Not provided 96.33% Kojima [21] 66 K 39 K Not provided More than 90% (mAP) Wei et al [22] Not provided Not provided 1582 Not provided Hao et al [23] Not provided Not provided 28.2 69.4% (mAP) Takasaki et al [24] 14 K 126 K Not provided Not provided…”

Section: Resultsmentioning

confidence: 99%

An FPGA-Based Hardware Low-Cost, Low-Consumption Target-Recognition and Sorting System

Wang,

Han,

Chen

et al. 2023

WEVJ

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In autonomous driving systems, high-speed and real-time image processing, along with object recognition, are crucial technologies. This paper builds upon the research achievements in industrial item-sorting systems and proposes an object-recognition and sorting system for autonomous driving. In industrial sorting lines, goods-sorting robots often need to work at high speeds to efficiently sort large volumes of items. This poses a challenge to the robot’s real-time vision and sorting capabilities, making it both practical and economically viable to implement a real-time and low-cost sorting system in a real-world industrial sorting line. Existing sorting systems have limitations such as high cost, high computing resource consumption, and high power consumption. These issues mean that existing sorting systems are typically used only in large industrial plants. In this paper, we design a high-speed, low-cost, low-resource-consumption FPGA (Field-Programmable Gate Array)-based item-sorting system that achieves similar performance to current mainstream sorting systems but at a lower cost and consumption. The recognition component employs a morphological-recognition method, which segments the image using a frame difference algorithm and then extracts the color and shape features of the items. To handle sorting, a six-degrees-of-freedom robotic arm is introduced into the sorting segment. The improved cubic B-spline interpolation algorithm is employed to plan the motion trajectory and consequently control the robotic arm to execute the corresponding actions. Through a series of experiments, this system achieves an average recognition delay of 25.26 ms, ensures smooth operation of the gripping motion trajectory, minimizes resource consumption, and reduces implementation costs.

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Section: Resultsmentioning

confidence: 99%

An FPGA-Based Hardware Low-Cost, Low-Consumption Target-Recognition and Sorting System

Wang,

Han,

Chen

et al. 2023

WEVJ

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FPGA Suitability for Implementation of Pedestrian Detection algorithms for Autonomous Driving Application

Gupta,

Kaur

2024

2024 2nd International Conference on Artificial Intelligence and Machine Learning Applications Theme: Healthcare and Internet O

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An FPGA-based Hardware Low-cost, Low-consumption Target Recognition and Sorting System

Wang,

Han,

Chen

et al. 2023

Preprint

View full text Add to dashboard Cite

In autonomous driving systems, high-speed and real-time image processing, along with object recognition, are crucial technologies. This paper builds upon the research achievements in in-dustrial item sorting systems and proposes an object recognition and sorting system for auton-omous driving. In industrial sorting lines, goods sorting robots often need to work at high speeds to efficiently sort large volumes of items. This poses a challenge to the robot's real-time vision and sorting capabilities, making it both practical and economically viable to implement a real-time and low-cost sorting system in a real-world industrial sorting line. Existing sorting systems have limitations such as high cost, high computing resource consumption, and high power consump-tion. These issues lead to the fact that existing sorting systems are typically used only in large industrial plants. In this paper, we design a high-speed, low-cost, low-resource-consumption FPGA (Field-Programmable Gate Array) based item sorting system that achieves similar perfor-mance to current mainstream sorting systems at a lower cost and consumption than existing sorting systems. The recognition part employs a morphological recognition method, which segments the image using a frame difference algorithm and then extracts the color and shape features of the items. To handle sorting, a six-degree-of-freedom robotic arm is introduced in the sorting segment. The improved cubic B-spline interpolation algorithm is employed to plan the motion trajectory and consequently control the robotic arm to execute the corresponding actions. Through a series of experiments, this system achieves an average recognition delay of 25.26ms, ensures smooth operation of the gripping motion trajectory, minimizes resource consumption, and reduces implementation costs.

show abstract

An autonomous driving system utilizing image processing accelerated by FPGA

Cited by 3 publications

References 1 publication

An FPGA-Based Hardware Low-Cost, Low-Consumption Target-Recognition and Sorting System

An FPGA-Based Hardware Low-Cost, Low-Consumption Target-Recognition and Sorting System

FPGA Suitability for Implementation of Pedestrian Detection algorithms for Autonomous Driving Application

An FPGA-based Hardware Low-cost, Low-consumption Target Recognition and Sorting System

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